電路的冗餘添加和移除以及基於自動測試圖樣產生/診斷的設計重新繞線都是用於邏輯設計電路中的合成和優化的重組技術。這兩種技巧可以移除一條存在目標電路線，然後連接另一條本來不在電路上的電路線使得電路的功能是沒有受到改變的。不過在這兩種方法中，由於一些限制，並非每一條電路線都可以成功地找到另一條電路線去取代它。此外，在基於自動測試圖樣產生/診斷的設計重新繞線方法中，需要去驗證重組之後的電路功能有沒有改變。因此，本文提出了一種一般性的邏輯結構重整技術，稱為非冗餘的移除及添加，它可以去移除任何想要移除的目標電路線。非冗餘的移除及添加這個技術建構出相對應的修正電路去修正由於移除目標電路線所造成的錯誤。在本文中，非冗餘的移除及添加技術被用在兩個應用，分別是搜尋替代線路及電路面積優化。實驗結果顯現，使用非冗餘的移除及添加方法在搜尋替代線路上比起之前的方法更有效。在電路面積優化上，跟SIS比較，結果非常令人激勵。

書頁名 - i
論文口試委員審定書 - ii
授權書 - iii
中文摘要 - iv
Abstract - v
Acknowledgements -vi
Contents - vii
List of Tables - ix
List of Figures - x
1. Introduction - 1
2. Notations and background - 4
3. Irredundancy removal and addition - 6
4. Single alternative wire identication using the IRRA approach - 12
4.1 SMA classification - 14
4.2 SMA substitution - 16
5. Area optimization using the IRRA approach - 18
6. Experimental Results - 20
7. Conclusions - 25
References - 25

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