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作者(中文):林沐葦
作者(外文):Lin, Mu Wei
論文名稱(中文):半導體廠商的創新策略:以設備商W公司為例
論文名稱(外文):The Innovation Strategy of Semiconductor Firm: The Case of Equipment Manufacturer Company W
指導教授(中文):洪世章
指導教授(外文):Hung, Shih Chang
口試委員(中文):曾詠青
林博文
口試委員(外文):Tseng, Yung Ching
Lin, Bou Wen
學位類別:碩士
校院名稱:國立清華大學
系所名稱:經營管理碩士在職專班
學號:103076539
出版年(民國):105
畢業學年度:104
語文別:中文
論文頁數:41
中文關鍵詞:創新策略半導體半導體設備廠商
外文關鍵詞:InnovationStrategySemiconductorSemiconductor Equipment Manufacturer
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自第一個電晶體問世以來,半導體產業已經發展超過半個世紀。期間一直遵循著摩爾定律,每隔18到24個月,電晶體的數量就會加倍。如今線寬已經來到10nm,是否即將達到物理極限?2008年時多數人認為物理極限是30nm,如今10nm即將在2017年量產。以往在挑戰每一個節點時,都有突破性的技術如浸潤式微影、雙重曝光技術、四重曝光技術、極紫外光微影技術,不斷將製程微縮的極限往更低的維度推進。雖然日前INTEL宣稱目標將在5nm製程再度達成摩爾定律。這樣的技術突破,最後會遇到甚麼樣的瓶頸?甚麼時候會走到終點?目前仍沒有答案。本研究中的個案分析對象為半導體設備龍頭,就是關鍵設備的提供者。該公司處於市場龍頭地位已經超過十年,一旦製程微縮到達物理極限,下一個階段,該何去何從?本研究使用常見的五力分析,先定義公司目前在競爭中的優勢與劣勢。並試圖基於實際參與以及個人經驗的累積,透過創新策略的各種面向,描述該公司採取的新策略,與策略的執行過程。最後從這些文字記錄中,爬梳整理出這段時間的策略成長軌跡,與最後結果。希望能夠提供一些實務觀點,描繪整理出個案公司創新策略的實際樣貌。
Since the 1st transistor was published, the innovation in semiconductor industry was continuing for fifty years. It was always following “the Moore’s Law”-The number of transistors on chip will be doubled every 18-24 months. Nowadays, the technology node of CD is approaching 10nm. Shall this be the end? When will the innovation be stopped by the physical constraint? In 2008, it was considered to be 30nm. Today, it’s just announced that TSMC is targeting to move into HVM at 10nm node in 2017. Although there’re some new technologies, like immersion, double-patterning, multi-patterning, or EUV, that can push the progress forward. No one can answer the question about what is the end of the shrinking competition. The case, which was discussed in this study, has been the market leader in semiconductor equipment industry for over ten years. Also it's the manufacturer of the most key-equipment. Once the progress hit the limitation of physics, what should they do in order to survive? This study utilizes the five force model to define the competitive advantage of the company. And try to put together with experience and records from participating in the real projects. Aim to figure out the profile of the strategy of the company. The valuable records from real experience and investigation will be helping on understanding the progress and history about how the company executing its innovation strategy and the whole picture.
第一章 緒論. 1
第一節 研究背景 1
第二節 研究動機與問題 2
第三節 研究方法與個案背景 2
第二章 個案現況 4
第一節 半導體設備廠商 5
第二節 個案公司的相關策略 7
第三章 個案分析 18
第一節 五力分析 18
第二節 五力分析的啟發與想像 24
第三節 創新六策分析 24
第四節 創新六策分析的啟發與想像 33
第四章 研究結果 34
第一節 結論 34
第二節 管理意涵 35
第三節 未來研究建議 37
第五章 參考文獻 38
第一節 中文文獻 38
第二節 英文文獻 39
第一節 中文文獻
1. 洪世章,2016,「創新六策」,台北市:聯經
2. 洪世章、曾詠青,2014,「師出有名:如何做好政策行銷」,產業與管理論壇,16(2):26-42。
3. 侯勝宗,2012,「見所未見:詮釋性個案研究方法探索」,組織與管理,第5卷第1期:111-153。
4. 王淑娟,2010,「最佳人氣部落格發展過程之質、量化研究」,雲林科技大學博士論文。
5. 吳麗君,2003,「論教育質性研究報告另類書寫的合理性」,國立台北師範學院學報,第16卷第1期:297-320。
第二節 英文文獻
Chen, KH. et. al., “Improving on-product performance at litho using integrated diffraction-based metrology and computationally designed device-like targets fit for advanced technologies (incl. FinFET)”, Proc. SPIE 9050, Metrology, Inspection, and Process Control for Microlithography XXVIII, 90500S (2014)
Benschop, J. et. al., “Integrated scatterometry for tight overlay and CD control to enable 20-nm node wafer manufacturing”, Proc. SPIE 8683, Optical Microlithography XXVI, 86830P (2013)
Bhattacharyya, K. et. al., “On-product overlay enhancement using advanced litho-cluster control based on integrated metrology, ultra-small DBO targets and novel corrections”, Proc. Of SPIE, 8681-3 (2013)
Mulkens, J. et. al., “High-order field-to-field corrections to achieve sub-20nm lithography requirements”, Proc. Of SPIE, 8681-54 (2013)
Bhattacharyya, K. et. al., “Advanced Litho-Cluster Control Via Integrated In-Chip Metrology”, ASMC (2013)
Chen, K. H., et. al., “Litho process control via optimum metrology sampling while providing cycle time reduction and faster metrology-to-litho turn-around time,” Proc. of SPIE 7971, 7105-797105-8 (2011).
Bhattacharyya, K., Wright, N., Van der Schaar, M., Den Boef, A., Hinnen, P., Shahrjerdy, M., Wang, V., Lin, S., Wang, C., Ke, C.-M., Huang, J., Wang, W., "New approaches for scatterometry-based metrology for critical distance and overlay measurement and process control," J. Micro/Nanolith. MEMS MOEMS 10(1), 013013-1-013013-8 (2011).
Ke, C.–M., et. al., “Evaluation of a new metrology technique to support the needs of accuracy, precision, speed and sophistication in near-future lithography,” Proc. of SPIE 7272, ISBN: 9780819475251 (2009).
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