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作者(中文):陳賢昊
作者(外文):Chen, Hsien Hao
論文名稱(中文):應用於鰭式場效電晶體之汲極延伸高壓元件研究
論文名稱(外文):A Study of Drain Extended FinFETs for High-Voltage Application
指導教授(中文):金雅琴
指導教授(外文):King, Ya-Chin
口試委員(中文):施教仁
林崇榮
口試委員(外文):Shih, Jiaw Ren
Lin, Chrong Jung
學位類別:碩士
校院名稱:國立清華大學
系所名稱:電子工程研究所
學號:103063536
出版年(民國):105
畢業學年度:104
語文別:中文
論文頁數:59
中文關鍵詞:高壓元件汲極延伸鰭式場效電晶體
外文關鍵詞:High Voltage DeviceDrain Extended FinFETs16 nm high-k metal gate
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近年來,消費性電子產品的需求日益提升,尤其是智慧型手機、平板電腦以及液晶銀幕的蓬勃發展,都與高壓元件的進步與改善息息相關,其中高壓元件的研究重點為要有良好的耐壓能力與優秀的導通能力,才能使元件能承受高壓與擁有極低的功率消耗,但是兩者間存在著權衡關係,需要取得最佳平衡。
本篇論文提出汲極延伸鰭式場效電晶體(Drain Extended FinFETs, DE-FinFET)並整合至16奈米邏輯製程的高壓元件,透過標準N型井(N-Well)離子佈植製程至汲極端,當作元件的漂移區(Drift Region)以承受高壓。另外,使用場板(Field Plate)與場限環(Field Limiting Ring)終端技術改善電場在表面集中的擁擠效應以提升元件的耐壓能力。透過TCAD(SDE和Sdevice)模擬軟體,分別用來模擬元件的製程結構和電性分析,在不同N-Well摻雜濃度、摻雜深度及不同場板長度下,針對元件耐壓能力和特徵導通阻值進行特性分析;並從量測結果顯示汲極延伸鰭式場效電晶體能有效地提升元件的耐壓能力並維持相當低的特徵導通阻值。利用此方式可相容於標準的邏輯製程中且不需要額外的打線接合(Wire bonding)技術,故可以降低製作成本及提高元件應用設計的彈性範圍。
In recent years, the demand of consumer electronics increases, smart phone, tablet computer and liquid-crystal display (LCD) especially, and the results can be generally credited to improvement and progress of power devices. Major concerns of characteristics of high-voltage devices are breakdown voltage and on-resistance since they closely related to voltage endurance and low power consumption. However, the trade-off between breakdown voltage and on-resistance exists, the good choice of them is the key point to design excellent high-voltage devices.
In this work, we propose drain extended FinFETs (DE-FinFET) which can be fully compatible with FinFET CMOS logic process without extra mask or additional process flow. We use standard N-Well to drain by ion implantation and define drift region to endure high voltage. Thus, termination design such as field plate and field limiting ring are employed to extend the corner electric field at edge of drain junction under metal gate. The structure design of drain extended FinFETs and the characteristics of devices are used SDE and Sdevice simulation tool. For different N-Well concentration, N-Well depth and field plate length, we discuss on characteristics analysis of breakdown voltage and on-resistance. Measurement results demonstrated that the drain extended FinFETs can effectively raise breakdown voltage and maintain low on-resistance. This fully logic compatible device does not need the additional masks and wire bonding process for connection, therefore, can be used to various applications and keep the cost down.
摘要 i
Abstract ii
致謝 iii
內文目錄 iv
附圖目錄 vi
表格目錄 viii
第一章 序論 1
1.1 研究動機 1
1.2 章節介紹 2
第二章 耐壓元件操作原理與發展回顧 3
2.1 耐壓元件操作原理 3
2.1.1 耐壓元件之導通特性與耐壓機制 3
2.1.2 耐壓元件之崩潰機制 4
2.1.3 邊際效應對於PN接面崩潰之探討 7
2.2 場限環及場板原理與基本架構 9
2.3 小結 10
第三章 應用於鰭式場效電晶體之汲極延伸高壓元件設計與模擬 20
3.1 元件結構 20
3.2 元件特性模擬 31
3.2.1 崩潰模擬特性分析 22
3.2.2 導通模擬特性分析 23
3.3 元件特性探討 23
3.4 小結 24
第四章 應用於鰭式場效電晶體之汲極延伸高壓元件的製作與量測 37
4.1 元件製作流程 37
4.2 元件特性量測與探討 38
4.2.1 導通特性量測結果 38
4.2.2 崩潰特性量測結果 39
4.3 元件特性之溫度效應 39
4.4 元件漏電流之探討與分析 40
4.5 小結 41
第五章 結論 55
參考文獻 56

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