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作者(中文):林晁慶
作者(外文):Lin, Chao Ching
論文名稱(中文):在雙列標準元件設計中考慮電源線對齊限制的超大型積體電路佈局
論文名稱(外文):VLSI Placement for Modern Design with Double-Row Height Standard Cells Considering Power Line Alignment Constraint
指導教授(中文):麥偉基
指導教授(外文):Mak, Wai Kei
口試委員(中文):蔡仁松
王廷基
口試委員(外文):Tsay, Ren Song
Wang, Ting Chi
學位類別:碩士
校院名稱:國立清華大學
系所名稱:資訊工程學系
學號:103062621
出版年(民國):105
畢業學年度:105
語文別:英文
論文頁數:28
中文關鍵詞:佈局
外文關鍵詞:placement
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傳統的電路佈局演算法假設所有標準元件都是同樣高度。但隨著製成的演
進,最近的設計中越來越常出現多重高度的標準元件。以往的方法會把多
重高度的標準元件當做可移動的巨集,這樣會浪費很多時間或者無法得到
一個合法的結果。實際上,標準元件都會有電源線分配在它的頂端或底
部。因此他們必須被放置在適當的位置才能運作。這篇論文中我們提出了
一個考慮電源線對齊限制下的雙列標準元件佈局。首先,我們將標準元件
群聚成三重高度的標準元件,然後把連續三個列當成一個列。之後就可以
應用傳統的佈局演算法,如果有標準元件不滿足電源線對齊限制,我們只
要將他與他配對的元件交換位置,或者往上或往下移動一個列就可以解決
這個問題。最後還有一些技巧用來改善我們的結果,讓最後的線長更短。
實驗結果顯示我們只比[12]篇多了2.6%的線長,但是他們沒有考慮電源線對齊的限制。
Traditional standard cell placement algorithms assume that all standard cells are the
same height that they can be aligned to placement rows. However, with the increasing
complexity of VLSI technology, multiple-row height cell becomes more common which
leads to a new challenge. Pervious works treat multiple-row height cell as movable macros
that will waste a lot of time or even cannot get a legal solution. In practice, standard
cells have power rail on the top or bottom side. Therefore, they must be aligned to proper
rows that they can be powered. In this thesis, we propose a double-row height placement
algorithm considering power line alignment constraint. First, we cluster cells to triple-row
height then we treat three consecutive rows as one row. Conventional placement algorithm
can be applied. Second, if there are cells do not satisfy power line alignment constraint,
we just swap it with its clustered cell or move it up/down one row to solve this problem.
Eventually, the refinement will further improve wirelength. The result shows we just get
2.6% worse wirelength compared to [12] while they do not consider power line alignment constraint.
1 Introduction 1
1.1 Placement 1
1.2 Related Works 2
1.3 Contribution 2
1.4 Organization 3
2 Problem Formulation 4
2.1 Wire Length Model 4
2.2 Power Line Alignment Constraint 5
3 Algorithm 7
3.1 Cell Pairing 8
3.2 Cell Clustering 11
3.3 Optimal Region 14
3.4 Refinement 15
4 Experiment 19
5 Conclusion 25
Reference 26
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