邏輯電路可分做兩類：組合(combinational)電路與循序(sequential)電路。然而，組合電路是可以被迴路化的。而迴路化組合電路為含有迴圈的組合電路。換言之，在迴路化組合電路內部的值皆為固定且穩態。目前已有一些探討迴路化組合電路於合成方面的研究，迴路化的組合電路具備降低面積及時間的優點。然而，在電路測試方面，相對於非迴路化組合電路，迴路化組合電路更為複雜且較少被探討。這篇論文分析迴路化組合電路上的測試問題，並且提出以滿足性為基礎的自動測試型樣產生(satisfiability-based automatic test pattern generation)。實驗結果顯示我們所提出的方法對於迴路化組合電路可達高的錯誤涵蓋率。

Logic circuits are classified into two categories: combinational circuits and sequential ones. However, combinational circuits could be cyclic, and cyclic combinational circuits are combinational circuits with feedback loops. That is, all the values in the cyclic combinational circuits are still fixed. Recently, some works have focused on the synthesis of cyclic combinational circuits such that the cyclic version of a combinational circuit can be available if it exists. Cyclified combinational circuits could take advantages of reducing area and timing. However, its testing problem is more complex than acyclic combinational circuits, and is still seldom discussed. In this work, we analyze the testing issue of cyclic combinational circuits and propose satisfiability-based automatic test pattern generation. The experimental results show that the proposed method can reach a high fault coverage for a set of cyclic combinational circuits.

中文摘要 i
Abstract ii
Acknowledgement iii
Contents iv
List of Tables vi
List of Figures vii
1 Introduction 1
2 Preliminaries 6
3 Properties of Cyclic Combinational Circuit with a Stuck-at Fault 10
3.1 Example..........10
3.2 Fault Site.......14
4 Proposed SAT-based ATPG 16
4.1 Driving Input..............16
4.2 Loop Unrolling.............18
4.3 Logic and Timing Details of Proposed Approach......25
4.4 Overall Algorithm..........26
5 Experimental Results 29
6 Conlusion 31

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