晶片網路因具有高度平行化和易擴充等特性，被廣泛使用於多核心系統下處理器之間的溝通。其中路由器負責處理器間資料的傳遞，扮演了重要的角色，然而其在閒置的狀態下仍有相當可觀的靜態功率消耗。為了解決此問題，常見的做法是對路由器使用功率閘控，當路由器沒有被使用時關閉其電源，藉此降低靜態功率消耗。為提升功率閘控的效率，我們提出快取記憶體索引方法，針對不同應用選擇適合的索引方法，使得晶片網路上路由器的閒置時間最大化。實驗結果顯示，藉由我們提出的快取記憶體索引方法平均可以使得晶片網路上的路由器閒置時間增加78.9%。

Network-on-chip (NoC) has been adopted as fast and efficient communication infrastructures in multi-core system for years. The on-chip routers play an important role in providing communication among cores. However, the routers consume considerable leakage power even if they are not in use. Applying power-gating to on-chip routers is a feasible approach to reduce the leakage power consumption. To take full advantage of router power-gating, we hope that the sleep period of routers can be as longer as possible. We propose a cache indexing algorithm such that accessing cache has the minimal impact on interrupting the sleep of idle routers. Experimental results show that our proposed method increases the sleep time of on-chip routers by 78.9% in average.

1 Introduction 1
2 Motivation 4
3 Target NoC architecture 7
4 Cache Indexing Algorithm for Maximum Idle Routers 10
4.1 Maximum Local Access (MLA) 11
4.2 Greedy Algorithm 14
5 Experimental Results 16
5.1 Simulation Environment 16
5.2 Results and Discussion 17
6 Conclusion 22

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