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作者(中文):何承剛
作者(外文):Ho, Cheng Kang
論文名稱(中文):Low Complexity Hybrid Precoding Algorithm using Multiple Orthogonal Codebook Matrices and Local Search
論文名稱(外文):利用多個正交編碼簿矩陣與局部搜尋之低複雜度混合式預編碼演算法
指導教授(中文):黃元豪
指導教授(外文):Huang, Yuan Hao
口試委員(中文):蔡佩芸
陳喬恩
賴以威
學位類別:碩士
校院名稱:國立清華大學
系所名稱:電機工程學系
學號:103061578
出版年(民國):105
畢業學年度:105
語文別:英文
論文頁數:67
中文關鍵詞:多輸入多輸出混合式預編碼毫米波
外文關鍵詞:MIMOHybrid PrecodingmmWave
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具備大天線陣列的多輸入多輸出毫米波系統將是下一世代通訊系統的關鍵研究題目,基於毫米波射頻鍊的高成本與高能耗,近期的研究提出了類比/數位混合式預編碼,作為適用於毫米波多輸入多輸出系統的預編碼架構。本論文首先介紹多輸入多輸出毫米波預編碼系統之數學模型,並介紹至今研究文獻所提出的混合式預編碼演算法,分析不同演算法在位元錯誤率與運算複雜度之優劣,我們並提出了一基於正交匹配與局部搜尋之改進的低複雜度混合式預編碼演算法,此演算法利用多個正交編碼簿矩陣與局部搜尋以降低運算複雜度,模擬結果證實我們提出的演算法和最新技術的演算法相比,可降低40%的運算複雜度,並只有可忽視的位元錯誤率損失。我們亦基於提出的低複雜度演算法設計並實現一混合式預編碼處理器,晶片使用了TSMC90nmCMOS製程技術實現,並透過國家晶片系統設計中心下線製作。我們設計的處理器在1/2/3/4 個資料流可分別達到11.1M/10.4M/6.9M/4.3M通道矩陣/每秒的吞吐量,和研究文獻中的處理器相比,可在僅28%的核心面積下於1/2/3/4個資料流分別提升65%/55%/40%/7.5%的吞吐量。
Millimeter wave (mmWave) multiple-input and multiple-output (MIMO) system with large antenna arrays is a key research topic in the next generation communication systems. Since the high cost and power consumption of mmWave radio frequency chain, the hybrid analog/digital precoding is recently proposed as a proper precoding architecture for mmWave MIMO systems. In this thesis, we propose a modified low complexity hybrid precoding algorithm based on orthogonal matching and local search. Simulations show that the proposed algorithm can reduce the computation complexity by 40% with negligible BER performance loss compared with state-of-the-art algorithm. We also design and implement a hybrid precoding processor based on the proposed low complexity algorithm. The chip is implemented using TSMC 90nm CMOS process technology. The throughput of implementation processor can achieve 11.1M/10.4M/6.9M/4.3M channel-matrices per second in 1/2/3/4 data streams, respectively. Compared with state-of-the-art work, we increase the throughput by 65%/55%/40%/7.5% in 1/2/3/4 data streams with only 28% core area.
1 Introduction 1
1.1 Millimeter Wave MIMO Systems . . . . . . . . . . . . . . . . . . . . . . 1
1.2 Research Motivation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2
1.3 Organization of This Thesis . . . . . . . . . . . . . . . . . . . . . . . . . 3
1.4 Notations . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3

2 Precoding in Millimeter Wave MIMO Systems 5
2.1 SVD-Based Digital Precoding . . . . . . . . . . . . . . . . . . . . . . . . 5
2.2 Hybrid Analog/Digital Precoding . . . . . . . . . . . . . . . . . . . . . . 8
2.3 Channel Model for Millimeter Wave MIMO Systems . . . . . . . . . . . . 9

3 Hybrid Precoding/Combining Algorithms 13
3.1 The Hybrid Precoding/Combining Optimization Problem . . . . . . . . . 13
3.2 Simultaneous Orthogonal Matching Pursuit (SOMP) . . . . . . . . . . . 15
3.3 Parallel-Index-Selection Matrix-Inverse-Bypass Simultaneous Orthogonal
Matching Pursuit (PIS-MIB-SOMP) . . . . . . . . . . . . . . . . . . . . 16
3.4 Orthogonality-Based Matching Pursuit (OBMP) . . . . . . . . . . . . . . 20
3.5 Orthogonal Matching and Local Search(OM+LS) . . . . . . . . . . . . . 22

4 Proposed Low Complexity Hybrid Precoding/Combining Algorithm 25
4.1 Proposed Low Complexity Hybrid Precoding/Combining Algorithm . . . 25
4.1.1 Multiple Orthogonal Codebook Matrices . . . . . . . . . . . . . . 26
4.1.2 Local Search . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29
4.1.3 Pseudocode of Proposed Algorithms . . . . . . . . . . . . . . . . . 30
4.2 Analysis of Performance and Computation Complexity . . . . . . . . . . 33

5 Hardware Architecture 41
5.1 System Architecture . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 41
5.2 Index Selection Unit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 42
5.3 Reconstruction Unit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 44
5.4 Time Schedule . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 44

6 Implementation Results 53
6.1 Design Flow . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 53
6.2 Chip I/O and Layout . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 54
6.3 Chip Specification . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 55

7 Conclusion 63
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