氮化鎵(GaN)為目前非常熱門的半導體材料，目前大部分利用外延性磊晶生長(Epitaxy)製得，因此也讓磊晶用基板成為重要的研究對象，其中矽基板因技術成熟、取得容易且成本相對低廉而成為未來發展趨勢，因其具有可大尺寸成長(large-scale growth) 及大規模生產(mass production) 的優點，使矽基板於多種磊晶片的選項中更具競爭力。但矽基板和氮化鎵因材料特性的差異會衍生出許多問題，其中因材料熱不匹配所導致的晶片邊緣產生破裂(crack)尤其重要，其原因來自於基板無法承受磊晶過程中之應力所導致。嚴重者會造成磊晶片直接破裂損毀，輕微者也會導致較差的氮化鎵磊晶薄膜品質，使得後續製備電路之電性受影響。

本研究主要透過利用奈米結構分散應力的效果強化基板提高其可承受之磊晶應力，使目前業界常用於磊晶氮化鎵之6吋矽基板的厚度1000 μm減薄至一般積體電路製程所使用的標準片厚度675 μm，同時磊晶後之氮化鎵特性預期維持與1000 μm厚度基板相同，並於奈米結構上沉積二氧化矽及非晶矽保護層避免奈米結構於後續半導體製程中被破壞。本實驗之目標為研發高強度之矽基氮化鎵基板，基板製備完成後磊晶2.5 μm氮化鎵並於其上製作簡易電晶體，與未進行任何處理之675 μm及1000 μm氮化鎵磊晶片比較，對新型基板之強度提升效果及應用可行性做驗證。

由於奈米結構強化基板分散應力之效果的關鍵在於奈米結構之均勻性，故於本實驗中先對奈米結構均勻性之優化做討論。接著透過不同沉積製程成長保護層薄膜以達到保護奈米結構的效果，並追蹤每一步沉積製程後之翹曲變化以確保不影響到後續磊晶製程。本實驗製備出之新型基板可達到高於2倍之強度提升並且對於後續所磊晶之氮化鎵特性及電晶體電性並無顯著影響。

Gallium nitride (GaN) is a very popular semiconductor material in recent years, which mostly is grown by epitaxy in industry. It makes the substrates for epitaxy GaN become a big issue. Among different kinds of substrates, GaN-on-silicon (GaN-on-Si) is very competitive as a result of the mature fabrication technique, low cost and also because Si substrate processes the advantages of large-scale growth and mass production. But Si and GaN have quite different material properties, and it leads to several issues which will cause the low quality of GaN epitaxy and affect the electricity of circuit which is going to fabricate. The most important issue is the thermal mismatch, it will cause cracks in the edge of Si wafer as a result of substrate cannot sustain the stress and will break the wafer in serious condition.

This research is mainly focus on enhancing the strength of Si substrate by the stress distribution effect of nanostructure. We fabricate nanostructure on Si wafer to thinner the thickness of 6 inch Si wafer used for epitaxy GaN from 1000 μm to 675 μm, which is the compliant thickness industry using, and the GaN film properties on nanotextured substrate are expected to be the same with which on 1000 μm substrate. Then deposit the covering layer (silicon dioxide and amorphous-silicon) on nanostructure to protect nanostructure from destroyed by subsequent process and the particle pollution. The objective of this research is to create a high strength GaN-on-Si substrate, and verifies its feasibility by comparing the properties of GaN and transistor with normal 1000 μm and 675 μm substrates.

The critical point of stress distribution effect is the uniformity of nanostructure, so we firstly discuss the optimization of the experiment parameter and the different initial condition of silicon substrate. After that we deposit protection layer by different kinds of chemical vapor deposition (CVD) and trace the bowing in each step. In this research, we fabricate a new type silicon substrate which has 2 times strength compare to common substrate and no obvious influence for GaN properties and electrical property of transistor.

第一章 前言.....................................................1
1.1 研究背景........................................................1
1.2 矽基氮化鎵(GaN-on-silicon)之挑戰..................................4
1.3 文獻回顧.......................................................12
1.3.1 應力消彌技術(Stress engineering)................................12
1.3.2基板強度提升技術............................................17
1.4 研究動機與目標.................................................21
1.5 研究架構.......................................................22
第二章 原理及理論............................................22
2.1基礎理論........................................................23
2.1.1 奈米結構之應力分散效應......................................23
2.1.2 保護層與基板之應力分析......................................27
2.2 製程理論.......................................................30
2.2.1 金屬輔助化學蝕刻 (Metal-assisted chemical etching; MACE) ........ 30
2.2.2 化學氣相沉積 (Chemical vapor deposition; CVD) ..................34
第三章 實驗規劃...............................................37
3.1 實驗設計及流程.................................................37
3.2 矽(111)基板金屬輔助化學蝕刻製備奈米結構實驗.....................40
3.3 二氧化矽及非晶矽保護層沉積實驗.................................41
3.4 氮化鎵磊晶實驗................................................42
3.5 電晶體製備實驗.................................................44
第四章 實驗結果與討論.................................45
4.1 矽(111)基板金屬輔助化學蝕刻製備奈米結構實驗.....................45
4.1.1實驗參數分析—侵蝕面........................................45
4.1.2實驗參數分析—拋光面........................................50
4.2保護層薄膜沉積實驗..............................................51
4.2.1 沉積保護層於侵蝕面奈米結構..................................51
4.2.2 沉積保護層於拋光面奈米結構..................................53
4.3 基板翹曲量測...................................................57
4.4 氮化鎵磊晶實驗.................................................60
4.4.1 顯微鏡觀測..................................................62
4.4.2 氮化鎵薄膜特性量測..........................................66
4.4.3 磊晶前後基板翹曲量測........................................76
4.5 電晶體電性量測.................................................78
4.6 三點抗折試驗...................................................81
4.6.1 侵蝕面奈米結構..............................................81
4.6.2 拋光面奈米結構..............................................82
4.6.3 氮化鎵磊晶..................................................84
第五章 結論及未來工作.......................................87
參考文獻........................................................89

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