有些方法已被提出來改善快閃記憶體元件的操作特性，如高介電常數材料、奈米線通道、無接面元件、矽化鍺、多晶鍺通道等等。由於，鍺相較於矽有比較高的電子遷移率，且多晶鍺元件可以使用低溫製程(<600。C)，可以降低製程熱預算。本篇論文將使用多晶鍺無接面快閃記憶體，並堆疊不同穿隧介電層來探討其元件特性。低介電係數的材料在相同操作電壓下有較大的穿隧電場，使得寫抹特性有較好的表現，例如二氧化矽(SiO2)。而三氧化二鋁(Al2O3)為高介電係數材料，在相同操作電壓下的穿隧電場較小，但是能夠阻止漏電流。本論文嘗試使用二氧化矽堆疊三氧化二鋁的穿隧氧化層，利用二氧化矽在穿隧氧化層有較大穿隧電場的特性，搭配較高介電係數材料三氧化二鋁補足不夠的物理厚度，希望能夠得到較好的元件特性以及電荷保持力。
本論文中第一個實驗是將感應耦合電漿化學氣相沉積(ICPCVD)、原子層沉積(Atomic Layer Deposition)等低溫系統應用於N型多晶鍺無接面快閃記憶體元件上，對不同材料的穿隧氧化層使用於多晶鍺無接面快閃記憶體元件來做探討。結果發現在N型通道的多晶鍺元件上，使用二氧化矽穿隧氧化層相較於使用三氧化二鋁穿隧氧化層的元件，在寫入的特性沒有明顯差異，但在抹除的部分明顯的較好。因為在給予相同的操作電壓下，使用二氧化矽穿隧氧化層的元件能夠有較大的穿隧電場，使得載子穿隧電流提升。
第二個實驗是將二氧化矽穿隧氧化層使用於P型多晶鍺通道，且新增了二氧化矽以及三氧化二鋁堆疊型的穿隧氧化層。結果發現二氧化矽以及三氧化二鋁堆疊型穿隧氧化層的元件，雖然寫入以及抹除速度較單層二氧化矽穿隧氧化層元件較差，但在可靠度上有較好的表現。除此之外，因為堆疊型的穿隧氧化層可以非常有效的抑制漏電流，使得電荷保持力有所提升。
第三個實驗是將前面兩個實驗所得結果應用於N型多晶矽無接面快閃記憶體元件上，我們發現元件表現得趨勢與前面結果類似。在使用單層的二氧化矽做為穿隧氧化層時，元件擁有相當好的寫入以及抹除速度。可以看到在堆疊型的穿隧氧化層使用上，可以非常有效的抑制漏電流，使得電荷保持力有所提升。使用相同堆疊型穿隧氧化層的多晶矽以及多晶鍺元件，在10微秒的寫入時間時，寫入速度只有2%的落後，在1毫秒的抹除時間時，抹除速度在2V記憶窗時大約有0.027秒的領先。從這個實驗中看出，多晶鍺無接面快閃記憶體元件已經有相當不錯的操作特性，並不遜色於多晶矽無接面快閃記憶體元件，因此多晶鍺元件很有潛力應用在三維高密度記憶體。

Some approaches have been reported to improve operation characteristics of flash devices such as high-k materials, nanowire channel, junctionless channel, poly-Ge and SiGe buried channel. The carrier mobility of Ge is higher than that of Si. Poly-Ge devices can be fabricated by low temperature process (<600。C), which can reduce process thermal budget. The electric field in a low dielectric constant material such as SiO2 is higher than that in a higher dielectric constant material like Al2O3 under the same operating voltage. Device with SiO2 tunneling layer has higher program/erase speed but poor retention characteristics as compared to Al2O3 tunneling layer. In this thesis, characteristics of poly-Ge flash memory device with SiO2 and Al2O3 tunneling layer are investigated and compared. With the advantages of SiO2 and Al2O3 tunneling layer, operation speed and retention characteristics can be both improved.
In the first part of this thesis, inductively coupled plasma chemical vapor deposition (ICPCVD) and atomic layer deposition (ALD) are applied on N-type polycrystalline germanium junctionless flash memory devices. Different materials are deposited as tunneling oxide on polycrystalline germanium flash memory devices. It is found that N-channel polycrystalline germanium devices with SiO2 tunneling layer have no significant difference in program characteristics as compared to those with Al2O3 tunneling layer. Since the electric field in SiO2 tunneling layer is larger and the carrier injection current is enhanced, devices with SiO2 tunneling layer have better erase characteristics at the same operating voltage.
In the second part, SiO2 tunneling layer and SiO2/Al2O3 stacked one on characteristics of flash devices with P-type polycrystalline germanium channel are compared. Program and erase speeds of devices with stacked tunneling layer are slower than those with single-layer silicon dioxide one. However, devices with SiO2/Al2O3 have better reliability performance. Devices with stacked tunneling layer can suppress leakage current effectively. Therefore, the retention characteristics are also improved.
In the third part, we can find the similar results as found before, namely, devices with single-layer of SiO2 as a tunneling layer have higher program and erase speeds. It can be seen that the leakage current can be suppressed very effectively in the stack-type tunneling layer, resulting in very good retention. Between polysilicon and poly germanium devices using the same stacked tunneling layer, program speed of poly germanium devices with SiO2/Al2O3 stacked tunneling layer is only 2% degradation at 10 μs and erase speed has 0.027 s improvement at same window measurement which keep in 2 V. It can also be seen from this experiment that poly-Ge junctionless flash memory devices already have quite good operating characteristics, not inferior to the poly-Si ones. Therefore, poly-Ge flash devices are promising for applications in 3D high-density memory.

摘要 i
Abstract iii
致謝 v
目錄 i
表目錄 iii
圖目錄 iv
第一章序論 1
1.1 快閃記憶體元件 1
1.1.1 浮動閘極式快閃記憶體元件 1
1.1.2 電荷捕捉式快閃記憶體元件 2
1.2多晶矽及多晶鍺薄膜電晶體 4
1.3多向式閘極結構與奈米線通道式快閃記憶體元件 5
1.4高介電係數材料與能帶工程 6
1.4.1 高介電系數材料 6
1.4.2 能帶工程 7
1.5無接面快閃記憶體元件介紹 8
1.6純鍺基板作為載子通道 10
1.7鍺材料雷射退火特性 11
1.8各章摘要 12
第二章快閃記憶體元件製程與操作方法 22
2.1快閃記憶體元件製程 22
2.1.1 原子層沉積系統 22
2.1.2 感應耦合型電漿化學氣相沉積系統 22
2.1.3 無接面奈米通道元件 23
2.2 快閃記憶體元件寫入與抹除方法 25
2.2.1 CHEI通道熱電子注入寫入 25
2.2.2 F-N穿隧寫入 26
2.2.3 F-N穿隧抹除 27
2.3 快閃記憶體元件可靠度特性 27
2.3.1 電荷保持力 27
2.3.2 耐久力 28
第三章利用感應耦合電漿化學氣相沉積系統沉積低溫穿隧氧化層之N型多晶鍺無接面快閃記憶體元件特性研究 38
3.1研究動機與背景 38
3.2實驗流程 39
3.3實驗結果與討論 41
3.3.1 元件汲極電流對閘極電壓特性圖 41
3.3.2 元件寫入與抹除特性 41
3.3.3 元件可靠度特性 42
3.4結論 43
第四章堆疊型穿隧氧化層之Undope-P型多晶鍺無接面快閃記憶體元件特性研究 52
4.1研究動機與背景 52
4.2實驗流程 53
4.3結果與討論 54
4.3.1 元件汲極電流對閘極電壓作圖 54
4.3.2 元件寫入與抹除特性 55
4.3.3 元件可靠度特性 56
4.4結論 56
第五章多晶鍺及多晶矽無接面快閃記憶體元件操作特性之比較研究 68
5.1 研究動機與背景 69
5.2 實驗流程 69
5.3 結果與討論 71
5.3.1 元件汲極電流對閘極電壓作圖 71
5.3.2 元件寫入與抹除特性 71
5.3.3 元件可靠度特性 73
5.4 結論 73
第六章結論 86
參考文獻 89

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