氮化鎵材料擁有寬能隙、高臨界電場、高電子飽和速度以及良好的熱傳導特性，因此近年來，氮化鎵高電子遷移率電晶體(GaN-based HEMTs)在高速元件以及高功率元件上的研究議題非常熱門，其中又以成長在矽(Si)基板之氮化鋁鎵/氮化鎵電晶體最為普及，雖然在特性上不如碳化矽(SiC)與藍寶石(sapphire)基板，然而考量到成本以及未來能與CMOS電路做整合，GaN-on-Silicon的研究被視為未來科技的主流之一。
本次論文藉由改變水平及垂直式佈局方式，藉此改善元件在高頻跟高功率上的特性。首先，藉由改變水平佈局以及使用電子束微影的方式微縮源極與汲極的間距，並且使用混合電極的架構，能同時有效提高元件在高頻以及高功率上的特性表現，f_T可達40GHz以上，f_max可達64GHz以上(g_m=187 "mS" ⁄"mm" ，I_d=877 "mA" ⁄"mm" )，並且在閘極與汲極間的崩潰電壓也可以達到39V的特性表現。最後再根據等效模型的建立，藉由模擬的結果方便我們取得改善的內部參數，並藉此調整進一步提高特性的佈局結構。接著藉由改變垂直佈局以及使用鍺擴散的方式，進一步改善在蕭特基能障二極體的導通電壓、漏電流以及崩潰電壓，提高元件在高功率上的特性表現，其中最好的特性表現裡，導通電壓改善了22%、崩潰電壓改善了257%，並且漏電流可以降低約一個數量級，此研究結果可以藉由不改變元件水平主動區面積，亦可以提升在高功率特性上的表現。

Recently, the researches of GaN-based HEMTs for high speed and high power devices become more and more popular owing to its wide band-gap, high critical electric field, high electron saturation velocity, and good thermal conductivity. In addition, the AlGaN/GaN transistor grown on Si substrate gain ground nowadays, although its property may not be as well as on SiC and sapphire substrate. However, GaN-on-Silicon is promising as the one of mainstream technology in the future when considering cost and the capability of CMOS integration.
In this thesis, we improve the characteristics of AlGaN/GaN devices for high frequency and high power applications by changing the layout both horizontally and vertically. First, by using E-beam to scale down the source-drain distance and using the hybrid electrode structure for horizontal layout, we can effectively improve the devices performance for high frequency and high power applications simultaneously, including the f_T up to 40 GHz, the f_max up to 64 GHz, the g_m "of 187 mS" ⁄"mm" , the I_d "of 877mA" ⁄"mm" , and the VBK of 39 V between gate and drain. In addition, we can obtain the intrinsic parameters and alter our layout structures for the better device properties according to the simulation of equivalent circuit model. Second, by using Ge diffusion for vertical layout, we can further improve the turn-on voltage, the leakage current, and the breakdown voltage in SBDs for high power applications. The Von can be improved up to 22%, the VBK can be improved up to 257%, and the leakage current can be suppressed about one order of magnitude. In conclusion, the results indicate that the high power characteristics can be improved without changing the area of horizontal active region.

誌謝 i
Abstract ii
摘要 iii
目錄 iv
圖表目錄 vii
表格目錄 xii
第一章 簡介 1
1.1 研究動機 1
1.2 論文架構 1
第二章 2
氮化鎵材料與異質接面電晶體 2
2.1 材料特性的比較 2
2.1.1 寬能隙半導體 2
2.1.2 電子遷移率及飽和速度 3
2.1.3 臨界電場與導通電阻 3
2.2 AlGaN/GaN異質介面場效電晶體 5
2.2.1 元件結構以及操作原理 5
2.2.2 自發性與壓變性極化效應 7
2.2.3 Interlayer 10
2.2.4 歐姆汲極(ohmic drain)及蕭特基汲極(schottky drain) 13
2.3 高頻AlGaN/GaN異質介面場效電晶體 17
2.3.1單位增益截止頻率(Unity Current gain frequency) 17
2.3.2短通道效應(Short channel effect) 18
2.4 本章總結 21
第三章 元件佈局設計與製程 22
3.1 高頻蕭特基-歐姆混合汲極之AlGaN/GaN HEMTs元件設計 22
3.2元件製程 24
3.3 黃光微影製程(Photolithography) 24
3.4 元件隔離平台(Mesa isolation) 25
3.5 歐姆接觸(Ohmic contact) 26
3.5.1 表面處理 27
3.5.2 金屬層蒸鍍 27
3.5.3快速熱退火處理(Rapid Thermal Annealing) 28
3.6 蕭特基閘極製作(Schottky gate) 29
3.6.1 線型閘極加入汲極外延層(Drain extend) 30
3.7 襯墊金屬層製作(Pad metal) 31
3.8 鈍化層製作(Passivation) 32
3.9 接線窗口蝕刻(Via etching) 33
3.10 量測方法(Measurement method) 33
3.10.1 Transfer Length Method(TLM) 33
3.10.2源極電阻(Source Resistance)量測 35
3.10.3高頻量測 36
3.11 本章總結 37
第四章 模型分析及量測討論 38
4.1 外部參數萃取以及去嵌入(de-embedding) 38
4.1.1開路與短路測試法(open pad & short pad) 38
4.1.2 元件偏壓量測(Cold FET)萃取法 40
4.2 高頻元件等效小訊號模型建立 43
4.3 元件測試條件 44
4.4 量測結果 46
4.4.1 元件直流量測結果 46
4.4.2 元件高頻量測結果 54
4.4.3 元件延遲時間量測結果 57
4.4.4 元件等效模型分析結果 60
4.5 本章總結 63
第五章 蕭特基能障二極體 64
5.1 AlGaN/GaN蕭特基能障二極體 64
5.2 元件佈局設計 66
5.3 元件製程 67
5.3.1 隔離平台蝕刻(Mesa Isolation) 68
5.3.2 鍺擴散(Ge diffusion) 68
5.3.3 歐姆接觸製作(Ohmic contact) 69
5.3.4 蕭特基接觸製作(Schottky contact) 69
5.3.5 鈍化層製作(Passivation) 70
5.3.6 接線窗口蝕刻(Via etching) 70
5.4 量測結果與討論 71
5.4.1 TLM量測結果 72
5.4.2 I-V直流特性結果 73
5.5 本章總結 84
第六章 總結與未來工作 85
6.1 總結(conclusion) 85
6.2 未來工作(Future work) 86
References 88

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