隨著半導體製程的快速發展，使得積體電路不斷的往高速、低功率、更高的集成度且更複雜的功能邁進。因此直通矽晶穿孔(TSV)的三維積體電路 (3-Dimentional IC)逐漸成為趨勢。其優勢為可縮小晶片面積且降低訊號間傳輸的距離。然而如何提升訊號的傳輸速度且保持訊號的完整性(Signal integrity)將是重要的問題。此時若利用正交分頻多工OFDM(Orthogonal frequency-division multiplexing)調變技術，將可以改善訊號受到通道的影響。此外， 3-D堆疊的晶片也可以利用OFDM調變將各層晶片的輸出訊號結合，以單一通道進行訊號傳輸，進而提升通道的傳輸速度及降低通道的使用數量。
整合型被動元件技術的發展，可以更進一步的縮小晶片面積及提升整體電路的效能。且此技術可結合在直通矽晶穿孔(TSV)的三維積體電路 (3-Dimentional IC) 中做系統的整合。因此本論文研究OFDM調變系統及整合型被動元件模型的建立，使其能應用於三維積體電路中，以提升訊號傳輸的完整性與速率。
在第一章中，對本論文研究的題目作整體的介紹，且敘述研究的動機。而在第二章中，介紹了QPSK及OFDM調變的基礎原理。藉由QPSK的映射，訊號傳輸速率將比BPSK提升2倍。此外，使用OFDM調變則能降低訊號頻率選擇性衰減、多路徑延遲與減緩ISI等問題，且增加系統頻寬使用效率。接著在第三章中，介紹了用於接收端電路的LNA, mixer及ADC等元件的基礎原理。
在第四章及第五章中，整體OFDM調變系統發送端與接收端電路將會做詳細的介紹。首先說明IDFT及DFT矩陣的數學原理，接著說明如何將IDFT及DFT矩陣用至OFDM系統的調變與解調變中，以及介紹用於本論文中的DAC, balun, LNA, mixer與ADC等類比電路。此調變系統發送端及接收端類比電路部分皆以TSMC CMOS 90nm製程做實現。系統發送端整體晶片面積為0.980.72 mm2，功率消耗為4.15mW。系統接收端整體晶片面積為1.260.94 mm2，功率消耗為21.6mW。在第六章中，介紹了IPD電感的PDK模型，以及用GIPD製程製作的變壓器、巴倫器、電容等元件。整體晶片面積為7.56.2 mm2。在最後的章節中，將會做本論文的結語，及未來研究延續的方向。

The exponential progress in CMOS technology leads to the integrated circuits and systems operating with high speed, low power, a high integration level, and complicated functions. The concept of three-dimensional integrated circuit (3D IC) with through silicon vias (TSVs) technology has been proposed. By stacking chips three-dimensionally, the issue of long interconnects can be mitigated, and small form factors can be expected. However, the signal integrity problem is an important issue in 3D IC. Thus we propose using the Orthogonal Frequency-Division Multiplexing (OFDM) modulation to reduce the interferences from the channel. In addition, the OFDM scheme can be applied to different layers of the 3D IC, and the channels from these layers can be combined to a single channel for data transmission. As a result, not only the transmission speed can be increased, but the number of transmission channels can be reduced significantly.
The progress in IPD technology leads to small form factor and high performances of the system. Furthermore, the IPD technology can be combined with the three-dimensional integrated circuit (3D-IC) and through silicon vias (TSVs). Thus in this thesis, we establish the equivalent circuit model of inductive devices in the IPD, which will be employed in the design for the OFDM signal transmission in the 3D IC technology to further increase the data transmission rate and keeping the signal integrity.
In chapter 1, the overall structures of this thesis and the research motivations are introduced. Chapter 2 describes the principles of QPSK mapping and OFDM modulation. By using the QPSK mapping, the data rate can be two times faster than the BPSK signal. In addition, the Orthogonal Frequency-Division Multiplexing (OFDM) modulation can reduce the frequency selective attenuation and multipath delay spread, and release the inter symbol interference (ISI) problems. Also, the bandwidth efficiency of the system can be enhanced. Chapter 3 introduces the fundamental principles of the building blocks of receiver such as the low-noise amplifier (LNA), mixer, and analog-to-digital converter (ADC).
In chapter 4 and chapter 5, the transmitter and receiver for the overall OFDM modulation system are described, which are both fabricated in 90-nm CMOS process. First, the mathematics of the Inverse Discrete Fourier Transform (IDFT) and Discrete Fourier Transform (DFT) matrix in this OFDM modulation system are described based on matrices operation. Also, the building blocks of the transceiver, including DAC, balun, LNA, mixer, and ADC used in this thesis are discussed. The transmitter has an overall 0.980.72 mm2 chip area with power consumption of 4.15 mW, and the receiver has an overall 1.260.94 mm2 chip area and 21.6 mW power consumption. In addition, this thesis also presents the design of IPD inductive components, which can be used for the I/O transmitter and receiver design. The process design kit (PDK) is also developed as the scalable equivalent circuit model in chapter 6. The overall chip area is 7.56.2 mm2. Chapter 7 concludes this work and provides some research directions for the future study.

致謝 i
摘要 ii
Abstract iv
目錄 vi
圖目錄 viii
表目錄 xii
Chapter 1 1
Introduction 1
1.1 Motivation 1
1.2 Thesis Organization 4
Chapter 2 5
Basic Concepts of QPSK and OFDM Modulation 5
2.1 Quadrature Phase-Shift Keying (QPSK) Modulator 5
2.2 Orthogonal Frequency Division Multiplexing (OFDM) Modulation 7
2.3 Summary and Conclusion 10
Chapter 3 11
Basic Concepts of LNA, Mixer, and ADC 11
3.1 Basics of Low-Noise Amplifier Design 11
3.2 Basics of Mixer Design 13
3.3 Nonlinearity 19
3.4 Basics of ADC Design 21
3.5 Summary and Conclusion 22
Chapter 4 23
QPSK with OFDM Modulation- transmitter 23
4.1 IDFT and DFT Matrices 23
4.2 Circuit Structure-Digital Circuit 25
4.3 Circuit Structure-Analog Circuit 29
4.4 Simulation and Measurement Results 31
4.5 Summary and Conclusion 38
Chapter 5 42
QPSK with OFDM Modulation- receiver 42
5.1 Circuit Structure-Analog Circuit 42
5.2 Circuit Structure-Digital Circuit 46
5.3 Simulation and Measurement Results 50
5.4 Summary and Conclusion 59
Chapter 6 62
IPD modeling 62
6.1 Motivation 62
6.2 Inductor's Model 63
6.3 Inductor's Model and EM-Simulation Comparison 66
6.4 IPD Tape-Out 70
6.5 Summary and Conclusion 78
Chapter 7 79
Conclusion and Future Work 79
7.1 Conclusion 79
7.2 Future Work 80
References 81

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