本研究針對一種新穎a-Si數位X光感測器進行讀出電路設計，目標為整合像素陣列2400 x 2400，像素間距50μm之主動陣列平板感測器，完成圖框更新率2 frame/s之數位X光系統，作為一般X光或乳房X光醫學影像用途。
本論文分為兩個部分。第一部份為傳統讀出電路架構。使用電荷放大器轉移像素電荷，透過相關二次取樣電路消除像素與放大器的直流偏移電壓，可以減少固定圖像雜訊。讀出電路之訊號讀出速度為10kHz，晶片包含電荷放大器、相關二次取樣電路、電壓準位移位電路，使用TSMC 0.35μm 2P4M製程實現，晶片佈局面積為4.1 mm2。實際量測發現二次取樣電路中的放大器偏移電壓，造成行級讀出電路產生行間固定圖像雜訊。
第二部份提出數位相關二次取樣方法實現類比數位轉換，數位二次取樣讀出電路包含電荷放大器、電流引導式數位類比轉換器、比較器、同步計數器及數位控制電路。本論文改良電荷放大器架構，並詳細介紹電流引導式數位類比轉換器及比較器的電路架構與設計考量。讀出電路訊號解析度需求為10-bit，數位類比轉換器轉換速度為10MHz，積分非線性與差動非線性皆小於0.5LSB。
將先前版本使用之類比二次取樣改為數位二次取樣電路，後者不存在前者放大器偏移電壓造成的固定圖像雜訊問題，還能夠改善傳統行級單斜率類比數位轉換器時脈偏移、電容不匹配和開關時脈饋入等非理想效應。

In this study, the readout circuit is designed for novel digital X-ray detector sensors, for the purpose of integrating with active matrix flat panel imagers, 2400 x 2400 pixel array and 50μm pixel size, into digital X-ray systems which frame rate is 2 frame/s, for radiography or mammography medical image applications.
This thesis is composed of two parts. The first part is conventional readout circuit architecture, using a charge amplifier to readout the pixel charge, and eliminate the offset voltage through a correlated double sampling (CDS) circuit to reduce fixed-pattern noise (FPN). The signal readout speed of the readout circuit is 10kHz, and the chip consists of a charge amplifier, a CDS circuit, and a level shifter, fabricated in TSMC 0.35μm 2P4M CMOS process and occupied 4.1mm2 area. The offset voltage in the amplifier of the CDS circuit is measured, which will cause column-to-column FPN (C-C FPN) in the column-level readout circuit.
In second part, a digital CDS technique is proposed to realize an analog-to-digital converter. The digital CDS circuit consist of a charge amplifier, a current-steering D/A converter (DAC), a comparator, a synchronous counter, and digital control logics. We improve the charge amplifier architecture, and design the current-steering DAC and comparator. The DAC conversion rate is 10MHz to achieve 10-bit signal resolution, which INL and DNL are both less than 0.5LSB.
The previous designed analog CDS is substituted by digital CDS, which does not exist the former FPN problem caused by the amplifier offset voltage, and also improve non-ideal effect, such as conversion error because of clock skew, capacitor mismatch and clock feedthrough, in the conventional column-level single-slope A/D converter.

摘要 I
ABSTRACT II
誌謝 IV
目錄 V
圖目錄 IX
表目錄 XIII
第一章 前言 1
1.1. 發展近況 1
1.2. 研究動機 3
1.3. 章節架構 5
第二章 數位X光影像系統 6
2.1. 系統介紹 6
2.1.1. 臨床用途 6
2.1.2. 數位X光感測器 7
2.1.3. 被動式像素感測器 8
2.1.4. 主動式像素感測器 9
2.1.5. 相關二次取樣電路 11
2.2. 影像感測器的雜訊 12
2.2.1. 暫態雜訊 12
2.2.1.1. 散粒雜訊 12
2.1.1.1. 重置雜訊 12
2.1.1.2. 暗電流 14
2.1.1.3. 讀出電路雜訊 14
2.2.2. 固定圖像雜訊 15
2.2.3. 等效雜訊電荷 16
2.2.4. 訊號雜訊比 18
2.2.5. 動態範圍 18
第三章 讀出電路架構與設計 19
3.1. 系統簡介 19
3.2. 像素架構與操作原理 21
3.3. 電路架構與操作原理 25
3.4. 子電路設計與模擬 31
3.4.1. 電荷放大器 31
3.4.2. 偏壓電路 35
3.4.3. 電壓位準移位器 37
3.5. 電路模擬與佈局 40
3.5.1. 電路模擬 40
3.5.2. 電路佈局 42
第四章 晶片測試 46
4.1. 印刷電路版設計 46
4.2. 量測原理 48
4.3. 儀器與外部IC介紹 49
4.4. 量測系統設置 50
4.5. 量測結果 51
4.6. 問題討論 53
4.6.1. 放大器直流偏壓問題 53
第五章 數位二次取樣電路架構與設計 56
5.1. 架構改良與動機 56
5.2. 電路操作原理 57
5.3. 子電路設計與模擬 61
5.3.1. 電荷放大器 61
5.3.2. 比較器 63
5.3.3. 數位類比轉換器 65
5.1.1.1. 電流源與鎖存器 69
5.1.1.2. 解碼器 70
第六章 結論與後續研究 72
參考文獻 73

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