|
[1] Flash-memory Translation Layer for NAND flash (NFTL). M-Systems, 1998. [2] Secure Deletion, https://ssd.eff.org/tech/deletion. Technical report, Surveillance Self-Defense, 2013. [3] A. Ban. Flash File System. US Patent 5,404,485. In M-Systems, April 1995. [4] S. Bauer and N. B. Priyantha. Secure Data Deletion for Linux File Systems. In USENIX Security Symposium, 2001. [5] Y.-H. Chang, J.-W. Hsieh, and T.-W. Kuo. Endurance Enhancement of Flash-Memory Storage Systems: An Efficient StaticWear Leveling Design. In the 44th ACM/IEEE Design Automation Conference (DAC), June 2007. [6] H. Cho, D. Shin, and Y. Eom. KAST: K-Associative Sector Translation for NAND Flash Memory in Real-Time Systems. In DATE, 2009. [7] A. Gupta, Y. Kim, and B. Urgaonkar. DFTL: a flash translation layer employing demand-based selective caching of page-level address mappings. In ASPLOS, 2009. [8] P. Gutmann. Secure Deletion of Data from Magnetic and Solid-State Memory. In USENIX Security Symposium Proceedings, 1996. [9] J. Kim, J. M. Kim, S. H. Noh, S. L. Min, and Y. Cho. A Space-Efficient Flash Translation Layer For CompactFlash Systems. IEEE Transactions on Consumer Electronics, Nov 2002. [10] K. C. Kung. Secure File Erasure. US Patent US5265159 A. In Hughes Aircraft Company, 1993. [11] J. Lee, J. Heo, Y. Cho, J. Hong, and S. Y. Shin. Secure Deletion for NAND Flash File System. In ACM symposium on Applied computing, 2008. [12] S.-W. Lee, D.-J. Park, T.-S. Chung, D.-H. Lee, S. Park, and H.-J. Song. A log buffer-based flash translation layer using fully-associative sector translation. ACM Transactions on Embedded Computing Systems, 6(3), July 2007. [13] YiWang et al. 3D-flashmap: A physical-location-aware block mapping strategy for 3D nand flash memory. DATE ’12. [14] Yu-Ming Chang et al. A Disturb-Alleviation Scheme for 3D Flash Memory. In ICCAD, 2013. [15] Micron. SLC NAND Flash Memory Features MT29F8G08ABACA, 2010. [16] M. Murugan and David.H.C.Du. Rejuvenator: A static wear leveling algorithm for nand flash memory with minimized overhead. In MSST, 2011. [17] D. Narayanan, A. Donnelly, and A. Rowstron. Write off-loading: Practical power management for enterprise storage. Trans. Storage, 4(3):10:1–10:23,Nov. 2008. [18] D. Park, B. Debnath, and D. Du. CFTL: A Convertible Flash Translation Layer Adaptive to Data Access Patterns. In SIGMETRICS, pages 14–18, June 2010. [19] Z. N. J. Peterson, R. Burns, and J. Herring. Secure Deletion for a Versioning File System. In USENIX Conference on File and Storage Technologies (FAST), 2005. [20] Z. Qin, Y.Wang, D. Liu, Z. Shao, and Y. Guan. MNFTL: An Efficient Flash Translation Layer for MLC NAND Flash Memory Storage Systems. In the ACM/IEEE Design Automation Conference (DAC), 2011. [21] SNIA IOTTA Repository. MSR Cambridge Traces, 2008. [22] SpecTek. 64Gib TLC NAND Flash Memory Features FNNB74A, 2011. [23] C.-H.Wu and T.-W. Kuo. An Adaptive Two-level Management for the Flash Translation Layer in Embedded Systems. In the IEEE/ACM Iinternational Conference on Computer-Aided Design (ICCAD), pages 601–606, New York, NY, USA, 2006. ACM. [24] M.-C. Yang, Y.-H. Chang, P.-C. Huang, and T.-W. Kuo. Working-Set-Based Address Mapping for Ultra-Large-Scaled Flash Devices. In CODES+ISSS, October 2012. [25] M.-C. Yang, Y.-H. Chang, C.-W. Tsao, and P.-C. Huang. New ERA: New efficient reliability-aware wear leveling for endurance enhancement of flash storage devices. In DAC, 2013.
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