此文中，我們將探討費米能接釘札(Fermi-level pinning)在n型錫化鍺(GeSn)基板上的現象。我們首先分析了金屬/錫化鍺/鍺的接面特性，發現其金屬-半導體接觸時的接面會產生非常高的蕭基能障(Schottky barrier)，若我們將其運用到電晶體的源極和汲極(Source/Drain)上，這個蕭基能障高度將影響電晶體的操作特性。因此在這篇論文中我們分別使用了CF4、O2以及NH3電漿，使錫化鍺與這些電漿產生反應，藉此產生一層抗釘札層(depinning layer)，藉此達到去除費米能接釘札的效應(Fermi level depinning)，其中氧氣電漿處理的結果最為顯著，蕭基能障高度從原本的0.63 eV下降到0.12 eV。除此之外，我們也同時運用了Germanide的方式來使源極與汲極達到歐姆接觸。在本研究中使用的金屬為鐿(Yb)並使用兩種沉積方式來形成Germanide，分別是以二氧化矽覆蓋(SiO2 capping)以及錫化鍺堆疊(GeSn capping)的方式來進行，並在沉積薄膜之後使用快速熱退火的處理，藉此形成Yb stanogermanide，而實驗的結果發現兩種方式都能成功地達到歐姆接觸，其中由於錫化鍺堆疊的方式可以成長出較厚的Yb stanogermanide，因此可以達到更高的電流密度。根據先前介紹的方式可以得知電漿處理以及Germanide的方式都可以成功地達到費米能接去釘札的效應，相信將此運用於MOSFET的Source/Drain上會使元件達到更好的特性。

Processes that achieve FL depinning for metal/n-Ge1-xSnx (1019 cm-3) contact were proposed for different technologies. For typical metal contact, O2 plasma treatment on Ge1-xSnx surface prior to metal contact is a more effective way for the purpose than other treatments since the formed GeSnOx has the desirable EG, ΔEc and κ value with the capability to passivate interfacial dangling bonds. For those require stanogermanide, YbGe1-xSnx formed by annealing of GeSn-capped Yb also exhibits ohmic conduction behavior due to interface states suppression. Both processes obtain low ρc of ~10-7 Ω-cm2 and ΦBN of ~0.1 eV, empowering next-generation GeSn technology.

總目錄
摘要 i
Abstract ii
致謝 iii
總目錄 iv
表目錄 vi
圖目錄 vii

第一章 序論 1
1-1 研究背景 1
1-2 GeSn能帶機制 2
1-3 GeSn接面 3
1-4 費米能階釘札 (Fermi level pinning) 4
1-5 研究動機 5
1-6 論文結構 6

第二章 文獻回顧 11
2-1 以分子束磊晶法 (Molecular beam epitaxy) 製作GeSn 11
2-2 以固相磊晶法 (Solid phase epitaxy) 製作GeSn 12
2-3 加入絕緣層之方式-Ultra thin film 19
2-4 利用電漿處理之方式-Plasma treatment 22
2-5 利用接面金屬化之方式-Germanide 23
2-6 利用離子佈植之方式-Ion implantation 25

第三章 實驗規劃原理及製作 27
3-1 GeSn/n-Ge 基板之製作 27
3-2 Al/Depinning layer/GeSn/n-Ge substrate 元件之製作 28
3-3 Yb stanogermanide/GeSn/n-Ge substrate 元件之製作 28

第四章 結果與討論 37
第一部分: Al/Depinning layer/GeSn/n-Ge substrate 元件之特性討論 37
4-1 電壓電流特性分析 37
4-2 蕭基能障高度分析 38
4-3 X射線光電子能譜分析 (X-ray Photoelectron Spectroscopy) 38
4-4 接觸電阻分析 (TLM Measurement) 39
第二部分: Yb stanogermanide/GeSn/n-Ge substrate 元件之特性討論 46
4-5 電壓-電流特性討論 - SiO2 capping 46
4-6電壓-電流特性討論 – GeSn capping 46
4-7 接觸電阻與蕭基能障高度比較 47
4-8 X射線繞射分析 (X-ray Diffraction) 47
4-9 穿透式電子顯微鏡分析 (Transmission Electron Microscopy) 48
第五章 結果與未來展望 52
參考文獻 54

第一章
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第五章
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