在此實驗中，我們利用固相磊晶的方式形成磊晶的錫化鍺薄膜用以當N型電晶體的通道並使用氧氣電漿形成錫化鍺氧化物當閘極介面的保護層。我們以兩個觀點來看此次實驗對錫化鍺N型電晶體的提升:(1)使用固向磊晶方式長成的薄膜製成方式較為簡單且花費較低，但先前的文獻只有P型電晶體的相關紀錄，此次實驗第一次證實利用固向磊晶方式也可應用於錫化鍺N型電晶體，(2)在閘極的製程上，我們在相同的ALD機台上，利用氧氣電漿形成錫化鍺氧化物保護層並沉積氧化鋁當閘極介電層，此一連續的步驟可使製程上更為簡單化。更重要的是，除了在簡化錫化鍺N型電晶體的製程步驟上，由於高品質的磊晶的錫化鍺薄膜和介面保護層，製成的元件在500 oC活化下，ION/IOFF比率可以超過4個等級，另外次臨界擺幅為156 mV/dec，另外介面缺陷密度為1.64×1011 cm-2eV-1，此元件展現高電子遷移率超過500 cm2/Vs。

GeSn N-MOSFETs fabricated on GeSn (Sn~4.5 %) formed by solid phase epitaxy (SPE) with GeSnOx passivation layer grown by O2 plasma were investigated in this work. The major advances compared to prior arts lie in two aspects. (1) epitaxial GeSn film by SPE has drawn intense interest due to relatively simple process with lower cost. However, only P-MOSFETs were reported on GeSn film by SPE. This is the first demonstration showing that SPE is also an eligible technique to empower high-performance GeSn N-MOSFETs. (2) O2 plasma for GeSnOx passivation layer growth can be integrated into the same ALD tool for high-κ dielectric deposition, making the process simpler. More importantly, besides the cost-effective process to implement GeSn N-MOSFETs, the devices exhibit high peak electron mobility exceeding 500 cm2/Vs which outperforms the data reported in the literature and can be ascribed to high quality of the epitaxial GeSn film as well as the effective surface passivation.

摘要…………………………………………………………………………………………......i
Abstract……………..……………………………………….…………...…………….……...ii
致謝………………………………………………………….………………...……………...iii
總目錄…………………………………………………………………………..………..…... iv
表目錄…………………………………………………………………..…...………...vi
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C. W. Lee, Y. H. Wu, C. H. Hsieh, and C. C. Lin, “Epitaxial GeSn film formed by solid phase epitaxy and its application to Yb2O3-gated GeSn metal-oxide-semiconductor capacitors with sub-nm equivalent oxide thickness,” Appl. Phys. Lett., vol. 105, no. 20, pp. 203508-1－203508-4, 2014.

G. Han, S. Su, L. Wang, W. Wang, X. Gong, Y. Yang, Ivana, P. Guo, C. Guo, G. Zhang,
J. Pan, Z. Zhang, C. Xue, B. Cheng, and Y. C. Yeo, “Strained Germanium-Tin (GeSn) N-channel MOSFETs featuring Low Temperature N+/P Junction Formation and GeSnO2 Interfacial Layer,” in Proc. Symp. VLSI Technol., pp. 97－98, Jun. 2012.