鰭式電晶體相對於傳統單閘極平面電晶體有更好的閘極控制能力，可使驅動電流增加、漏電流減小。但隨著通道長度的微縮使得以通道摻雜濃度調變臨界電壓的方式面臨瓶頸；氧化層厚度的微縮讓氧空缺使平帶電壓下降的問題浮上檯面。在本論文中，分成三部分來探討金屬與高介電層製程對元件電特性的影響，分別為氮氣電漿處理、ALD沉積時間調變以及ALD沉積溫度調變處理。
第一部分，在鰭式場效電晶體的金屬閘極後進行不同秒數的電漿氮化處理，改變金屬閘極的功函數，進而改變電晶體的臨界電壓。在多數文獻中有提及，金屬層中氮含量比例愈高， P型電晶體能得到的臨界電壓就愈小。然而實驗結果與預期相反，原因推測為沉積出的金屬層內氮含量比例已達飽和，再增加氮含量會使得功函數些微下降。氮氣電漿處理使P型電晶體操作電流上升約5-6%，N型電晶體操作電流些微下降，與等效氧化層厚度變化所得結果相符合。我們提出兩種可能機制來解釋此現象，為氮氣擴散至高介電層內以及介面層增厚。
第二部分，使用兩種ALD水氣通氣時間來研究氧空缺效應，較長水氣通氣時間使高介電層內氧原子含量增高，晶相轉變為單斜晶相，相對的氧空缺含量更少。實驗結果可從N型鰭式電晶體臨界電壓上升、P型鰭式電晶體臨界電壓下降的結果獲得證實。雖然等效氧化層厚度因較長ALD水氣時間而上升，但次臨界擺幅、介面陷阱密度與漏電流下降，電晶體可靠度也因而提升。
第三部分，使用兩種ALD沉積溫度來研究氧空缺效應，在較高溫ALD沉積溫度下，高介電層之晶相會轉變為較穩定單斜晶相，因氧空缺的鈍化，在較高溫ALD沉積溫度下可得到較小的臨界電壓標準差。在不影響操作電流的情況下，等效氧化層厚度因高介電層內較高氧含量而些微上升，次臨界擺幅、介面陷阱密度與漏電流減小，電晶體可靠度提升。

FinFET devices have higher on current and lower leakage current due to better gate control ability compared to the conventional single gate planar FETs. With the scaling of gate length, threshold voltage tuning by channel doping will be an issue. With the scaling of EOT, flat band voltage roll-off caused by oxygen vacancy needs to be solved. There are three parts in this thesis to dicuss the impacts of high-k/metal gate process on device characteristics, which are plasma nitridation, ALD pulse time and ALD growth temperature modulation.
In the first part, different time of plasma assisted nitridation is implemented on metal gate to adjust work function and achieve multi-Vt FinFET. It has been reported that threshold voltage in PFinFET decreases with a higher nitrogen concentration in metal gate. However, results in this work are contrary to expectation. It supposes that nitrogen concentration of metal gate is already saturated, and effective work function may be decreased with further nitridation treatment. The on current is increased over 5-6% for PFinFET and slightly decreased for NFinFET, which are consistent with the results of EOT. Two possible mechanisms are proposed to explain electrical characteristics of FINFET, which are nitrogen diffusion into high-k layer and interfacial layer regrowth.
In the second part, two different H2O pulse time in ALD are implemented to study the oxygen vacancy effect. The crystallization of high-k is transferred into monoclinic phase with higher oxygen content by a longer H2O pulse time. Less oxygen vacancy can be also obtained, which is verified by the increased and decreased threshold voltage for NFinFET and PFinFET, respectively. Sub-threshold swing, Dit, and leakage current are decreased, and good reliability is obtained by longer H2O pulse time in ALD although EOT is slightly increased.
In the third part, two different deposition temperatures in ALD are implemented to study the oxygen vacancy effect. The crystallization phase of high-k is transferred to more stable monoclinic by a higher deposition temperature in ALD. Smaller standard deviation of threshold voltage can be achieved by a higher deposition temperature in ALD because of the reduced oxygen vacancy. EOT is slightly increased due to the higher oxygen content in high-k, and it doesn’t decrease the on current. Sub-threshold swing, Dit, and leakage current are decreased, and good reliability is obtained as well.

摘要 I
致謝 V
目錄 VII
表目錄 X
圖目錄 XI
第一章 序論 1
1.1前言 1
1.2尺寸微縮所產生的效應 1
1.3 鰭式電晶體優點 3
1.4 閘極後製 (Gate-last) v.s. 閘極先製 (Gate-first) 4
1.5 臨界電壓調變方式 4
1.6 平帶電壓(Flat band voltage) 6
1.7 平帶電壓下降 (Flat band voltage roll-off) 6
1.8 氧空缺 (Oxygen vacancy) 介紹 6
1.9 氧空缺鈍化 8
1.10 氮化鈦 (TiN) 金屬閘極氮化 9
1.11 閘極引發汲極漏電流 (GIDL) 與介面陷阱之關係 10
1.12 論文架構 11
第二章 元件製程與量測 24
2.1 鰭式電晶體製造流程 24
2.2電性量測 24
2.2.1電容量測 24
2.2.2 電晶體量測 25
第三章 不同時間長度氮氣電漿處理對N型與P型鰭式 電晶體之電特性影響 30
3.1研究動機 31
3.2製程與量測 32
3.3實驗結果與討論 33
3.3.1 不同時間長度氮氣電漿處理對N型與P型鰭式電晶體臨界電壓變化之討論 33
3.3.2 不同時間長度氮氣電漿處理對電容元件之電性分析 34
3.3.3 不同時間長度氮氣電漿處理在N型鰭式電晶體中之電性分析 35
3.3.4不同時間長度氮氣電漿處理在P型鰭式電晶體中之電性分析 36
3.4 結論 37
第四章 調變ALD高介電層前驅物 — 水氣cycle數對 N型與P型鰭式電晶體之電特性影響 54
4.1 研究動機 55
4.2製程與量測 56
4.3 實驗結果與討論 57
4.3.1 調變ALD高介電層前驅物 — 水氣cycle數對P型與N型基板電容之電性分析 57
4.3.2 調變ALD高介電層前驅物 — 水氣cycle數對N型與P型鰭式電晶體之電性分析 58
4.4 結論 60
第五章 調變ALD沉積溫度以減少氧空缺對鰭式電晶體的電特性影響 72
5.1研究動機 73
5.2製程與量測 74
5.3實驗結果與討論 75
5.3.1 調變ALD高介電層沉積溫度對P型與N型基板電容之電性分析 76
5.3.2 調變ALD高介電層沉積溫度對N型與P型鰭式電晶體之電性分析 76
5.3.3 調變ALD沉積高介電層之水氣cycle數與調變ALD沉積高介電層之溫度對於氧空缺鈍化的比較 78
5.4 結論 80
第六章 結論與展望 94
6.1結論 94
6.2未來展望 96
參考文獻 97

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