近年來,平板電腦和智慧型手機市場發展蓬勃,個人電腦的傳統 硬碟(Hard Disc Drive, HDD)也逐漸被固態硬碟(Solid State Drive, SSD) 取代。這些裝置採用的儲存裝置因系統需求而異,包括屬於非揮發性 記憶體(Non-volatile Memory)的快閃記憶體(Flash Memory)、揮發性記 憶體的動態隨機存取記憶體(Dynamic Random-access Memory, DRAM) 和靜態隨機存取記憶體(Static Random-access Memory, SRAM)。在非揮 發性記憶體中,快閃記憶體面臨了許多的挑戰,像是需要較高的操作 電壓、緩慢的寫入/抹除時間。此外,大部分的記憶體元件都需要特殊 的半導體製程,只有少數的記憶體像是SRAM完全相容於CMOS邏輯 製程,但SRAM屬於揮發性記憶體,因此找尋新的非揮發性記憶體, 且擁有低操作電壓,並相容於邏輯製程即成為相當熱門的研究課題。
本論文以90奈米互補式金氧半邏輯製程實現一接觸點電阻式隨機 存取記憶體(Contact Resistive Random Acess Memory,CRRAM)。此記憶 體所占的面積極小且完全符合邏輯製程,隨著製程微縮仍然保有優異 的特性。藉由直流掃描分析(DC Sweep)與交流脈衝分析(AC Pulse)找到 最佳操作條件。此CRRAM通過十萬次的設置/重置循環測試,以及1000 小時150oC的烘烤測試,在耐久度與可靠度方面沒有任何疑慮,充分顯 示CRRAM具有成為新一代前瞻性非揮發性記憶體的潛力。藉由微幅 更改製程步驟,可實現更高良率的CRRAM。
增量階躍脈衝演算法(Incremental Step Pulse Programming, ISPP) 確保CRRAM每次的設置/重置都可達到設定的電阻值。藉由更改ISPP 程式的電流閥值(Thredshold Current),可逐漸增加或減少CRRAM的電 阻值,實現多電阻態(Multi-level Cell, MLC)增加記憶體容量。

Sells of tablets and smart phones are rising up significantly recently. HDD(Hard Disk Drive) in Personal computer components sell markets are also replaced gradually by SSD(Solid State Disk). Different types of memory are embedded in these devices, including Non-volatile memory, like flash, and Volatile memory, like Dynamic random-access memory(DRAM), and Static random-access memory(SRAM). In the category of Non-volatile memory, flash memory is facing plenty of problems nowadays, including high operating voltage, and long program/erase time. Besides, most of the memory requires specific semiconductor manufacturing process to be fabricated. Only memory like SRAM is fully compatible to CMOS manufacturing process technology. Therefore, finding a non-volatile, low operating voltage, and is compatible to CMOS manufacturing process has been a popular research topic.
Based on 90nm CMOS logic process, we realized Contact Resistive Random Access Memory(CRRAM). Ultra small size, fully CMOS compatible, and great scalability are its main characteristics. By DC Sweep and AC pulse operation, we find the optimal operation condition. Over 100k cycling test and 1000 hours 150oC baking test guarantee CRRAM unit cell has no reliability concern. It fully shows that CRRAM has the potential to be the candidate of novel, non-volatile memory in the next generation. By changing the process slightly, the yield of CRRAM is expected to be improved.
Incremental Step Pulse Programming(ISPP) is studied and implemented in the cycling test of the CRRAM in order to achieve the specific resistance level. By changing the threshold current, gradually changing resistance is achievable. Multi-level cell(MLC), can increase memory capacity.
Finally, based on 90nm CMOS logic process, a 16Mbits CRRAM array is constructed and studied.

摘要
Abstract
致謝
內文目錄
附圖目錄
附表目錄
第一章 序論
1.1 電阻式記憶體相關應用
1.2 電阻式記憶體陣列
1.3 接觸點電阻式記憶體的結構與製程
1.4 新型接觸點電阻式記憶體的結構與製程
1.5 論文大綱
第二章 接觸點電阻式記憶體
2.1 RRAM模型
2.1.1 自我加速熱溶解模型
2.1.2氧空缺粒子跳躍模型
2.1.3 RRAM電路模型、物理分析以及多電阻態分析
2.2 接觸點電阻式記憶體之操作方式與特性
2.2.1基本操作方式
2.2.2讀取電壓分析
2.3 小結
第三章 接觸點電阻式記憶體單元
3.1 單元結構
3.2 單元量測環境
3.3 直流、脈衝操作與寫入速度分析
3.4 寫入干擾、耐久度與可靠度分析
3.5 增量階躍脈衝演算法應用與最佳化
3.6 小結
第四章 接觸點電阻式記憶體陣列
4.1 陣列結構與操作方式
4.2 晶片封裝與陣列量測環境
4.3 量測結果討論
4.4 小結
第五章 總結及未來展望
5.1 總結
5.2 未來展望
參考文獻

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