近年來，隨著環保意識的高漲，能源議題備受矚目，電力電子和功率元件的結合發展之功率積體電路將成為明日之星。而如何獲得良好的耐壓能力與導通阻值之權衡和降低製作成本一直是功率元件的研究重點，儘管許多研究發表只需少數光罩即可完成，但仍為特殊製程，需藉由打線接合(Wire bonding)技術將功率元件和系統電路部分之邏輯製程連接，其製作成本及傳輸速度將會是一大問題
一般金氧半場效電晶體的崩潰電壓，容易受到表面峰值電場影響，將會造成金氧半場效電晶體的閘極介電層可靠度降低。在先前論文提出一個可整合於28奈米互補式金氧半金屬閘極製程的功率元件，稱為浮空場板金氧半場效電晶體 (Floating Field Plate MOSFETs)。薄閘極介電層下，藉由浮空閘極使空乏區延伸，減緩在汲極接面邊緣的電場，以提高耐壓。但是由於其架構有著導通特性不佳的問題，所以本論文提出了一個改良型FFPMOS，在浮空閘極間加入電容來增加閘極至閘極的耦合感應，稱GGCFFPMOS；從量測結果顯示浮空場板金氧半電晶體可以有效的改善閘極引致崩潰(Gated breakdown)，使其電壓接近接面崩潰，而此架構又更進一步改善了崩潰電壓與導通電阻之間的權衡；此元件不需漂移區(Drift region)光罩且不需額外的打線接合技術，故可降低製作成本及增加高壓電路設計之彈性應範圍。

Over the past few decades, the importance of sustainable development had been rooted in people’s mind deeply. Therefore, the energy harvesting and power IC technology becomes the key issues. How to get a good balance between the breakdown voltage and the on-resistance is critical in designing power devices. Typical power devices are fabricated by special process that need the extra wire bonding to connect the system circuit and the power device. So the high cost is a major problem of this.
The general MOSFET’s breakdown voltage is affected by surface peak electric field. It causes the MOSFET’s gate dielectric reliability getting worse. In the previous work, a Floating Field Plate MOSFET (FFP-MOSFET) was fabricated by 28nm CMOS process. With floating gate as its field plate, its depletion region will be extended, reduces the drain-side peak electric-field. However, FFPMOS suffers from large on-resistance. This work presents a GGCFFPMOS which introduce external capacitors between the floating gates. Measurement results show that gated-breakdown voltage is successfully extended. Furthermore, the trade-off between the breakdown voltage and the on-resistance improves. Without special process defined drift region or extra masks, this device is formed by pure logic process and allow for high flexibility.

內文目錄
摘要 ……………………………………………………………….……i
Abstract ii
致謝 ……………………………………….………………………….iii
內文目錄 iv
附圖目錄 vi
附表目錄 viii
第一章 緒論 1
1.1 前言 1
1.2 章節介紹 2
第二章 耐壓操作原理與發展回顧 2
2.1 元件操作原理 2
2.1.1 功率元件導通耐壓機制 3
2.1.2 功率元件崩潰機制 4
2.1.3 曲率效應對於PN接面崩潰之探討 6
2.2 場限環與場板原理及基本結構 7
2.2.1場限環技術 7
2.2.2場板技術 8
2.3 小結 9
第三章 元件設計與模擬 18
3.1 GGCFFPMOS元件設計概念 18
3.2 GGCFFPMOS元件模擬 20
3.2.1 關閉狀態特性模擬 20
3.2.2 導通狀態特性模擬 21
3.3 GGCFFPMOS特性探討 22
3.4 小結 22
第四章 元件的製作與量測 31
4.1 元件製作流程 31
4.2 GGCFFPMOS特性量測與探討 32
4.2.1 崩潰特性量測 32
4.2.2 導通特性量測 32
4.3 元件可靠度分析 33
4.4 GGCFFPMOS寫入特性探討 34
4.5 小結 34
第五章 結論 47
參考文獻 48

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