帕金森氏症是一種常見的神經失調疾病，由於神經細胞的退化，使得神經的運動調節功能喪失，導致患者產生身體不規律顫抖、運動遲緩等症狀。深層腦部電刺激是將電極植入病患腦部的特定區域，藉由提供特定頻率的電刺激，來有效地抑制腦部不正常的神經電訊號或刺激神經細胞活性。
近幾年來，人們致力於發展植入式腦機介面系統。腦機介面系統結合了記錄單元與刺激單元，藉由記錄單元偵測腦中異常訊號來進行病情診斷，並利用刺激器提供相對應的電刺激訊號來進行深層腦部電刺激，以抑制腦部不正常放電，而其無線傳輸方式的設計則可避免裝置穿過病患皮膚可能造成的感染。植入式裝置必須操作在低電壓下，以符合低功耗的需求，但仍須產生高電壓以供刺激，因此在系統中需要升壓電路來將低供應電壓轉換成高電壓。
本論文提出一個應用於腦機介面中，可提供深層腦部電刺激治療的電壓可調式神經刺激器。採用電荷幫浦作為升壓電路，並藉由回授機制調整輸出電壓，可藉由5 位元的電壓控制訊號來改變刺激電壓，在僅需1V供應電源的情況下，可提供3V~8V的輸出電壓。此架構的優勢在於其並非僅調整刺激輸出的電壓，而是調整升壓電路所產生的電壓，藉由電路自行依刺激所需升壓，可節省升壓過程中的功耗，而達到省電的效果。此外，本論文使用可整合於標準製程中的耐高壓電晶體─汲極延伸金氧半場效電晶體，來做為刺激電壓輸出端的切換開關，以提供雙向的輸出。
本系統於TSMC 0.18μm CMOS 製程實現，經由量測驗證晶片並與模擬結果比較，分析並提出更進一步的改良方式。

Parkinson’s disease (PD) is a common neurodegenerative disorder. The motor symptoms such as tremor and bradykinesia result from the degeneration of dopaminergic neurons in the substantia nigra. Deep brain stimulation (DBS) is a new therapy for Parkinson’s disease. By implanting electrodes to particular regions of the brain and giving electrical impulses with specific frequency, DBS can suppress the abnormal electrical impulses and induce neuronal activity.
The brain machine interface (BMI) consisting of both recording unit and stimulator are well developed. BMI can record and detect the abnormal signal in brain of the patient, and then, give the corresponded stimulation. Without wires penetrating animal bodies, the wireless implanted device can prevent patient from infection, while the operating voltage should be lower to reduce power consumption. However, the stimulator has to provide high voltage for effective stimulation, so a voltage multiplier is indispensable.
This work proposes a voltage-tunable stimulator combined with CMOS-compatible high-voltage transistors, i.e. drain-extended MOS (DEMOS). With a supply voltage of 1V, the output voltage can vary from 3V to 8V, according to 5-bit digital control signal. This design has low power consumption because the charge pump circuit adjusts output voltage automatically. Therefore, the proposed stimulator is suitable for applications in implanted brain machine interface. Applying DEMOS allows it to be integrated with the BMI system in one chip. Two test chips are implemented in a TSMC 0.18μm CMOS process to verify the proposed stimulator design.

摘要 I
Abstract III
致謝 V
目錄 VII
圖目錄 X
表目錄 XV
第一章 緒論 1
1.1 研究背景 1
1.2 研究貢獻 2
1.3 章節概述 4
第二章 文獻回顧 5
2.1 帕金森氏症病狀及治療方式 5
2.2 相容於邏輯製程之耐高壓元件 6
2.3 電荷幫浦(charge pump)電路 9
2.3.1 Cockcroft-Walton電荷幫浦 9
2.3.2 Dickson電荷幫浦 11
2.3.3 利用電荷傳遞開關之改良式Dickson電荷幫浦 12
2.3.4 利用交叉耦合電荷傳遞開關之電荷幫浦 13
2.4 高壓神經刺激驅動電路 15
2.5 總結 18
第三章 相容於標準邏輯製程之耐高壓元件模擬與量測 20
3.1 汲極延伸金氧半場效電晶體(DEMOS)結構 21
3.2 DEMOS元件模擬結果 23
3.3 DEMOS元件量測結果 27
第四章 第一版神經刺激電路設計 31
4.1 系統架構 31
4.2 電路架構 33
4.2.1 電荷幫浦(charge pump) 33
4.2.2 數位類比轉換器(DAC) 34
4.2.3 放大器 36
4.2.4 電壓控制振盪器 36
4.2.5 數位控制單元 38
4.3 電路模擬結果 38
4.3.1 數位類比轉換器(DAC)模擬結果 38
4.3.2 放大器模擬結果 40
4.3.3 電壓控制振盪器模擬結果 41
4.3.4 總電路模擬結果 41
4.4 晶片佈局與規格 43
4.5 電路量測結果 45
4.5.1 晶片量測平台 45
4.5.2 數位類比轉換器量測結果 46
4.5.3 電壓控制振盪器量測結果 47
4.5.4 總電路量測結果 49
第五章 第二版神經刺激電路設計 53
5.1 第一版電路問題分析與改進 53
5.2 系統架構 54
5.3 電路架構 56
5.3.1 電荷幫浦(charge pump) 56
5.3.2 數位類比轉換器(DAC) 57
5.3.3 放大器 58
5.3.4 電壓控制振盪器 59
5.3.5 數位控制單元 59
5.3.6 輸出驅動電路 60
5.4 電路模擬結果 61
5.4.1 數位類比轉換器模擬結果 61
5.4.2 放大器模擬結果 63
5.4.3 電壓控制振盪器模擬結果 64
5.4.4 總電路模擬結果 65
5.5 晶片佈局與規格 68
5.6 電路量測結果 70
5.6.1 量測平台 70
5.6.2 數位類比轉換器量測結果 72
5.6.3 放大器量測結果 73
5.6.4 電壓控制振盪器量測結果 73
5.6.5 總電路量測結果 76
5.7 實驗結果討論 79
第六章 結論與未來展望 81
6.1 結論 81
6.2 未來研究方向 82
參考文獻 83

[1] K. Abdelhalim, H. M. Jafari, L. Kokarovtseva, J. L. Perez Velazquez, and R. Genov, "64-Channel UWB Wireless Neural Vector Analyzer SOC With a Closed-Loop Phase Synchrony-Triggered Neurostimulator," IEEE J. Solid-State Circuits, vol. 48, pp. 2494-2510, 2013.
[2] M. Azin, D. J. Guggenmos, S. Barbay, R. J. Nudo, and P. Mohseni, "A Battery-Powered Activity-Dependent Intracortical Microstimulation IC for Brain-Machine-Brain Interface," IEEE J. Solid-State Circuits, vol. 46, pp. 731-745, 2011.
[3] R. Hyo-Gyuem, J. Jaehun, J. A. Fredenburg, S. Dodani, P. Patil, and M. P. Flynn, "A wirelessly powered log-based closed-loop deep brain stimulation SoC with two-way wireless telemetry for treatment of neurological disorders," in Symposium on VLSI Circuits (VLSIC), 2012, pp. 70-71.
[4] A. Merola, M. Zibetti, S. Angrisano, L. Rizzi, V. Ricchi, C. A. Artusi, et al., "Parkinson's disease progression at 30 years: a study of subthalamic deep brain-stimulated patients," Brain, vol. 134, pp. 2074-2084, Jul 2011.
[5] Handbook of Parkinson's Disease, 3rd ed. New York: Marcel Dekker, 2003.
[6] H. M. Khoo, H. Kishima, K. Hosomi, T. Maruo, N. Tani, S. Oshino, et al., "Low-frequency subthalamic nucleus stimulation in Parkinson's disease: A randomized clinical trial," Movement Disorders, vol. 29, pp. 270-274, Feb 2014.
[7] Smart power ICs: Technologies and Applications, 2nd ed. vol. 6: Springer, 2002.
[8] A. W. Ludikhuize, "A review of RESURF technology," in Proc. The 12th International Symposium on Power Semiconductor Devices and ICs, 2000, pp. 11-18.
[9] J. C. Mitros, C.-Y. Tsai, H. Shichijo, M. Kunz, A. Morton, D. Goodpaster, et al., "High-voltage drain extended MOS transistors for 0.18um logic CMOS process," Electron Devices, IEEE Transactions on, vol. 48, pp. 1751-1755, 2001.
[10] X. L. Han and C. H. Xu, "Design and characterization of STI compatible high-voltage NMOS and PMOS devices in standard CMOS process," in Solid State Device Research Conference, 2007. ESSDERC 2007. 37th European, 2007, pp. 175-178.
[11] Y. Q. Li, C. A. T. Salama, M. Seufert, P. Schvan, and M. King, "Design and characterization of submicron BiCMOS compatible high-voltage NMOS and PMOS devices," IEEE Trans. Electron Devices, vol. 44, pp. 331-338, Feb 1997.
[12] 陳韋霖, "具有負載適應性之抑制癲癇發作電流刺激器設計," Master, 電子研究所, 國立交通大學, 2010.
[13] G. Palumbo and D. Pappalardo, "Charge Pump Circuits: An Overview on Design Strategies and Topologies," Circuits and Systems Magazine, IEEE, vol. 10, pp. 31-45, 2010.
[14] K. Ming-Dou and C. Shih-Lun, "On-Chip High-Voltage Charge Pump Circuit in Standard CMOS Processes With Polysilicon Diodes," in Asian Solid-State Circuits Conference, 2005, 2005, pp. 157-160.
[15] E. T. S. W. J. D. Cockcroft, "Experiments with High Velocity Positive Ions. (I) Further Developments in the Method of Obtaining High Velocity Positive Ions," Proc. R. Soc. Lond. A, vol. 136, pp. 619-630, 1932.
[16] J. F. Dickson, "On-chip high-voltage generation in MNOS integrated circuits using an improved voltage multiplier technique," IEEE J. Solid-State Circuits, vol. 11, pp. 374-378, 1976.
[17] J.-T. Wu, Y.-H. Chang, and K.-L. Chang, "1.2 V CMOS switched-capacitor circuits," in IEEE International Solid-State Circuits Conference, 1996. Digest of Technical Papers. 42nd ISSCC., 1996, pp. 388-389.
[18] J.-T. Wu and K.-L. Chang, "MOS charge pumps for low-voltage operation," IEEE J. Solid-State Circuits, vol. 33, pp. 592-597, 1998.
[19] P. Favrat, P. Deval, and M. J. Declercq, "A high-efficiency CMOS voltage doubler," IEEE J. Solid-State Circuits, vol. 33, pp. 410-416, 1998.
[20] K.-S. Min, Y.-H. Kim, J.-H. Ahn, J.-Y. Chung, and T. Sakurai, "CMOS charge pumps using cross-coupled charge transfer switches with improved voltage pumping gain and low gate-oxide stress for low-voltage memory circuits," in IEEE International Symposium on Circuits and Systems, 2002. ISCAS 2002. , 2002, pp. V-545-V-548 vol.5.
[21] U. Bihr, T. Ungru, H. Xu, J. Anders, J. Becker, and M. Ortmanns, "A bidirectional neural interface with a HV stimulator and a LV neural amplifier," in IEEE International Symposium on Circuits and Systems, 2013. ISCAS 2013., 2013, pp. 401-404.
[22] M. Ghovanloo and K. Najafi, "A compact large Voltage-compliance high output-impedance programmable current source for implantable microstimulators," IEEE Trans. Biomedical Engineering, vol. 52, pp. 97-105, 2005.
[23] B. Serneels, T. Piessens, M. Steyaert, and W. Dehaene, "A high-voltage output driver in a 2.5-V 0.25um CMOS technology," IEEE J. Solid-State Circuits, vol. 40, pp. 576-583, 2005.
[24] C. Y. Tseng, S. C. Chen, T. K. Shia, and P. C. Huang, "An Integrated 1.2V-to-6V CMOS Charge-Pump for Electret Earphone," in IEEE Symposium on VLSI Circuits, 2007, pp. 102-103.
[25] C. Wang, M. O. Ahmad, and M. N. S. Swamy, "A CMOS current-controlled oscillator and its applications," in IEEE International Symposium on Circuits and Systems, 2003. ISCAS 2003., 2003, pp. I-793-I-796 vol.1.