|
[1] M. Pan, N.Viswanathan, and C. Chu. An efficient and effective detail placement algorithm In Proceedings of the International Conference Computer-Aided Design, pages 48-55, 2005. [2] S. Goto An Efficient Algorithm for the Two-Dimensional Placement Problem in Electrical Circuit Layout. IEEE Transactions on Circuits and Systems, Volume:28, issue:1, pages 12-18, 1981. [3] M.-C. Kim. IEEE CEDA/taiwan MOE,ICCAD 2013 contest. Retrieved October 10,2013 from http://cad_contest.cs.nctu.edu.tw/CAD-contest-at-ICCAD2013/problem_b/, 2013. [4] P. Spindler, U. Schlichtmann, and F. Johannes. Kraftwerk2 - A fast force-directed quadratic placement approach using an accurate net model. IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, 27(8):1398-1411, 2008. [5] W.-K. Chow, J.Kuang, X.He, W.Cai, F.Y.Young. Cell density-driven detailed placement with displacement constraint. In Proceedings of the International symposium on physical design, Pages 3-10, 2014. [6] S. Popovych, H.-H. Lai, C.-H. Wang, Y.-L. Li, W.-H. Liu, T.-C. Wang. Density-aware Detailed Placement with Instant Legalization. In Proceedings of the 51st Annual Design Automation Conference, pages 1-6, 2014 [7] A.E. Caldwell, Optimal partitioners and end-case placers for standard-cell layout. In IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, Volume:19, Issue:11, pages 1304-1313, 2000 [8] U. Brenner and J. Vygen. Faster optimal single-row placement with fixed ordering. In Proceedings of the conference on Design automation and test in Europe, pages 117-121, 2000. [9] A. Kahng, P. Tucker, and A. Zelikovsky, Optimization of linear placements for wirelength minimization with free sites. In Proceedings of the Asia and South Pacific Design Automation Conference, pages 241-244, 1999. [10] M.-K. Hsu, Y.-F. Chen, C.-C. Huang, T.-C. Chen, and Y.-W. Chang. Routability driven placement for hierarchical mixed-size circuit designs. In Proceedings of the 50th Annual Design Automation Conference, pages 1-6, 2013. [11] X. He, T. Huang, W.-K. Chow, J. Kuang, K.-C. Lam, W. Cai, and E. Young. Ripple 2.0: High quality routability-driven placement via global router integration. In Proceedings of the 50th Annual Design Automation Conference, pages 1-6, 2013. [12] W.-H. Liu, C.-K. Koh, and Y.-L. Li. Optimization of placement solutions for routability. In Proceedings of the 50th Annual Design Automation Conference, pages 1-9, 2013. [13] A. Agnihotri, S. Ono, C. Li, M. Yildiz, A. Khatkhate, C.-K. Koh, and P. Madden. Mixed block placement via fractional cut recursive bisection. IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, 24(5):748-761, 2005. [14] M.-C. Kim, N. Viswanathan, C. J. Alpert, I. L. Markov, and S. Ramji. Maple: multilevel adaptive placement for mixed-size designs. In Proceedings of the International Symposium on Physical Design, pages 193-200, 2012. |