數位對時間轉換器被廣泛的運用在包含雷達系統和資訊傳輸系統的許多系統中來調整精準的時間延遲，此研究提出一個使用耦合電感電容震盪器的數位對時間轉換器，此架構是發想自傳統四相位電感電容震盪器，傳統架構為完全對稱且產生精準的四相位輸出訊號作為I/Q通道，提出的架構為刻意地去控制電路的不對稱性來調整輸出訊號的相位，設計了正弦內插法的內插器於耦合電路之中，每個內插器可調整90度的相位，且在調整過程中維持耦合的強度以降低電路的相位雜訊。
此篇研究使用了台積電90奈米的CMOS製程製作晶片，根據量測結果，本電路操作在7G赫茲的頻率下將週期切成8個bits的調整，微分非線性誤差小於1.71LSBs，等同於時間間格小於1.5p秒，能量消耗為16.84m瓦。

Digital-to-time converters (DTCs) have been widely used in many applications, including radar and data communication systems [1–4], for accurate timing adjustment. This work presents a digital-to-time converter using coupled LC oscillators. Originating from quadrature LC oscillators [5–11] where the architecture symmetry is carefully maintained to generate accurate I and Q signals, the proposed design varies the output phase by intentionally adjusting the relative strengths of the coupling circuits. Sinusoidal interpolation employed in the coupling circuits achieves 90 of phase adjustment with a single interpolator in each coupling circuit. Furthermore, the coupling strengths are carefully adjusted so as to maintain a low phase noise performance across all phase settings [7].
This work is designed and implemented with 90-nm CMOS technology. Measurement results show that, with the core oscillators operating at 7GHz and 8 bits of phase adjustment across the entire oscillation cycle, differential nonlinearity (DNL) of less than 1.71 LSBs, which is equivalent to timing adjustment step of no more than 1.5ps, is achieved. The total power consumption is 16.84mW.

Contents iv
List of Tables vi
List of Figures vii
1 Introduction 1
1.1 Motivation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
1.2 Contribution . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
1.3 Thesis Overview . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
2 LC Oscillators 6
2.1 LC Oscillator . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
2.1.1 LC tank equivalent circuits . . . . . . . . . . . . . . . . . 7
2.1.2 Impedance of LC tank . . . . . . . . . . . . . . . . . . . 8
2.1.3 Time domain analysis of LC tank . . . . . . . . . . . . . 10
2.1.4 Oscillation condition . . . . . . . . . . . . . . . . . . . . . 13
2.1.5 Noise in LC oscillators . . . . . . . . . . . . . . . . . . . . 15
2.1.6 Operation mode of LC oscillators . . . . . . . . . . . . 18
2.2 Topologies of LC oscillators . . . . . . . . . . . . . . . . . . . . 21
2.3 Quadrature LC oscillators . . . . . . . . . . . . . . . . . . . . . . 24
3 Proposed Circuit Implementation 27
3.1 Core Oscillators Implementation . . . . . . . . . . . . . . . . . . 30
iv
3.2 Coupling Circuits Implementation . . . . . . . . . . . . . . . . 34
3.3 Measurement Considerations . . . . . . . . . . . . . . . . . . . 40
4 Simulation result 44
4.1 Layout . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 44
4.2 Post-layout simulation . . . . . . . . . . . . . . . . . . . . . . . . 46
5 Measurement Results 50
5.1 PCB layout . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 50
5.2 Test Chip Photo . . . . . . . . . . . . . . . . . . . . . . . . . . . . 52
5.3 Performance Measurement . . . . . . . . . . . . . . . . . . . . . 53
5.4 Performance summary . . . . . . . . . . . . . . . . . . . . . . . . 58
6 Conclusion 60
Bibliography 61

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