在此篇論文中，我們提出兩種不同的腦機介面解決方案，並且都和類比前端電路、刺激電路以及無線資料傳輸電路整合。在電路後端的部分更與使用者介面來做結合以期達到使這些微型化系統能夠真正地運用在臨床的實驗上，更進一步的希望能夠完成一個具有醫療效用的腦機介面去幫助那些深受帕金森氏症所惱的病人。
在我們所提出的第一個系統架構下，數位核心部分是一個改良過8051的可程式化數位電路，其工作頻率是操作在2百萬赫茲，以及基於減少功率消耗的考量下，整體電路則操作在1伏特電壓。整個數位核心電路提供了8個通道的即時記錄和有效刺激功能來得到關於如何利用刺激來調節神經活動和抑制帕金森氏症的訊息。從神經元的紀錄數據，所提出之改良過後的Lempel-Ziv無損數據壓縮電路將輸入數據處理之後構成的字典來替代輸入信號。 除此之外，醫師可以輸入刺激參數和觀察所記錄到的神經訊號藉由在電腦上的圖形化用戶界面（GUI）。此數位核心電路與植入式神經微系統已經整合下線驗證，使用的是台積電的0.18微米標準CMOS技術。數位核心電路的功率消耗為385微瓦，整個晶片面積為3.06×2.53平方毫米而數位核心部分則為2.09×0.59平方毫米。
在第二版微型化系統則提出了一個實驗研究方法，藉由一個嵌入式生醫系統處理平台來進行生物醫學信號演算法處理，並藉由這些演算法分析來達成深部腦刺激（DBS）。此嵌入式生醫系統處理平台是基於OpenRISC1200處理器（OR1200）來實現高取樣率（4千赫茲）以及多通道記錄（2通道）大腦神經元記錄的目的。因此，生物信號前處理，基於不同頻率解析度的功率頻譜分析（1024，512和256點）和相位分析是由本生物醫學處理器所進行。此生物醫學處理器由台積電0.18微米標準CMOS技術電路合成下，整體硬體所占面積是52800邏輯閘數並且可以在100百萬赫茲工作頻率下運行。但是，受限於Altera公司的DE2-115的Cyclone IV E EP4CE115F29C7 現場可程式化閘陣列板(FPGA)最大系統操作頻率為50百萬赫茲，則此生醫處理器平台最高只能在50百萬赫茲。在電信量測後，這些系統的評估以及所有的實驗結果都會在本論文中詳細描述與討論。

In this thesis, two solutions of brain machine interfaces (BMI) are proposed. Both of them
are integrated with analog front-end circuits, stimulation circuits and wireless data transmission
module. Moreover, these systems are further combined with the graphical user interface
(GUI) to achieve the goal that a complete microsystem can be actually applied in clinical experiments.
In addition, this microsystem also provides another treatment with medical efficacy
for those patients with Parkinson’s disease.
In the version I, a programmable digital core based on modified 8051 is operated at 2MHz
clock rate and 1V operation voltage to reduce the power consumption. This digital core provides
8 channels real-time recording as well as 8 channels effective stimulation for acquiring
information on how stimulation modulate neural activities and depressing the symptom of
Parkinson’s disease. As the recording data from neurons, the Lemp-Ziv lossless data compression
circuit compresses the data by the dictionary constructed of input data processing.
Additionally, physicians can input the stimulation parameters and observe the recording neural
informations on a PC through the graphical user interface (GUI). The digital core integrated
with implantable neural microsystem has been fabricated with TSMC standard 0.18m
CMOS technology. The power consumption of the digital core is 385W with 2.09*0.59mm2
core area, and the full chip area is 3.06*2.53mm2.
In the version II, the prototyping system is proposed for experimental study of the deep
brain stimulation (DBS) mechanism by embedding the biomedical signal processing algorithms
to biomedical processor. The biomedical processor based on OpenRISC 1200 (OR1200)
is implemented to achieve the goal that performs neuron recording with high sampling rate
(4KHz) for the purpose of multi-channel recording (2 channels). Therefore, the signal preprocessing,
varied resolutions of power spectral analysis(1024, 512 and 256 points) and the
ii
phase analysis are conducted by this biomedical processor. As this biomedical processor is
synthesized by TSMC standard 0.18m CMOS technology, the overall hardware area is 52.8K
gate counts and the operating clock rate can be operated at 100MHz. However, the maximum
system clock rate is 50MHz in this biomedical platform due to the limitation of the Altera
DE2-115 Cyclone IV E EP4CE115F29C7 FPGA board. The resource of this FPGA design
costs 3,811 logic elements and 662,528 memory bits. After the electrical measurements for
evaluating of these systems, all of the experimental results are presented and discussed in this
thesis.

iv CONTENTS
4 System Architecture 29
4.1 Implantable Neural Microsystem . . . . . . . . . . . . . . . . . . . . . . . . 29
4.1.1 Recording System . . . . . . . . . . . . . . . . . . . . . . . . . . . 30
4.1.2 Stimulation System . . . . . . . . . . . . . . . . . . . . . . . . . . . 31
4.1.3 Wireless Power and Data Transmission System . . . . . . . . . . . . 32
4.1.4 The Digital Core Based on an Ameliorated Microcontroller 8051 . . . 33
4.1.5 Graphical User Interface . . . . . . . . . . . . . . . . . . . . . . . . 34
4.1.6 System Specifications . . . . . . . . . . . . . . . . . . . . . . . . . 35
4.2 An Experimental Study of Micro-Stimulation and Recording System for Using
in Brain Machine Interface . . . . . . . . . . . . . . . . . . . . . . . . . 36
4.2.1 Recording System . . . . . . . . . . . . . . . . . . . . . . . . . . . 36
4.2.2 Voltage Controlled Stimulation (VCS) Front-End . . . . . . . . . . . 37
4.2.3 Biomedical Processor Based on OR1200 . . . . . . . . . . . . . . . 38
4.2.4 Graphical User Interface . . . . . . . . . . . . . . . . . . . . . . . . 40
4.2.5 System Specifications . . . . . . . . . . . . . . . . . . . . . . . . . 41
5 System-on-Chip Design of Digital Core for Biomedical Platform 43
5.1 The Design of Digital Core Based on 8051 . . . . . . . . . . . . . . . . . . . 43
5.1.1 Firmware Design . . . . . . . . . . . . . . . . . . . . . . . . . . . . 43
5.1.2 Hardware Design . . . . . . . . . . . . . . . . . . . . . . . . . . . . 47
5.2 The Design of Biomedical Processor Based on OR1200 . . . . . . . . . . . . 49
5.2.1 System Configuration . . . . . . . . . . . . . . . . . . . . . . . . . 49
5.2.2 Firmware Design . . . . . . . . . . . . . . . . . . . . . . . . . . . . 50
5.2.3 Hardware Design . . . . . . . . . . . . . . . . . . . . . . . . . . . . 55
6 Implementation and Experimental Results 59
6.1 Mixed-signal System-on-Chip Integration of Implantable Neural Microsystem 59
6.1.1 ASIC Implementation Results . . . . . . . . . . . . . . . . . . . . . 59
6.1.2 Electrical Measurements . . . . . . . . . . . . . . . . . . . . . . . . 64
6.2 Experimental Results of Micro-Stimulation and Recording System for Using
in Brain Machine Interface . . . . . . . . . . . . . . . . . . . . . . . . . . . 66
CONTENTS v
6.2.1 Simulation Results of Digital Processor . . . . . . . . . . . . . . . . 68
6.2.2 Electrical Measurements . . . . . . . . . . . . . . . . . . . . . . . . 70
6.3 Comparison with Other Studies . . . . . . . . . . . . . . . . . . . . . . . . . 73
7 Conclusions and Future Prospects 77
7.1 Conclusions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 77
7.2 Future Prospects . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 78

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