隨著嵌入式系統產品日新月異，設計者需要更快速、有彈性與低成本的產品開發方法。因此在論文中，我們提出一個可程式化嵌入式系統平台，而此嵌入式平台是基於開源碼處理器來開發。為了適用於穿戴式應用，我們將介紹兩個可程式化嵌入式平台，分別應用在可穿戴式的生醫訊號監控系統以及人體近身網路傳送機。
可穿戴式的生醫訊號監控系統包含了可量測心電圖以及呼吸訊號的前端電路、可做訊號前處理的可程式化嵌入式平台、可無線傳輸資料的藍芽模組，以及可接收資料並顯示接收到訊號的智慧型手機或平板。而可做訊號前處理的可程式化嵌入式平台包含了一個openMSP430處理器以及一些週邊設備，像是記憶體、通用型之輸入輸出、通用非同步收發傳輸器和序列週邊介面。另外，我們使用一套開發工具包含編譯器與組譯器來做軟體開發，而論文也會提供開發基於openMSP430嵌入式平台的方法，並使用台積電0.18微米標準CMOS技術合成openMSP430處理器以及週邊設備，得到其硬體所占面積約為13,000邏輯閘數且可在50百萬赫茲的工作頻率下運作。此平台也驗證於以Xilinx Spartan-3AN 現場可程式閘陣列(FPGA)實現的心電圖／呼吸紀錄原型模組上，並使用了FPGA上2,928個查找表(LUTs)以及8,000位元組記憶體空間。整個系統操作在50 百萬赫茲工作頻率下，並耗掉3,732個時脈週期做訊號前處理，在3.3 伏特操作電壓下，平均功耗為229毫瓦。
在人體近身網路傳送機部分，包含了二軸加速器、類比前端電路、類比數位轉換器、數位類比轉換器、頻率合成器、功率放大器以及數位處理器。數位處理器是一個改良過的8051數位電路，我們以此發展出一個可程式化的傳送機來重構內部功能以符合人體近身網路不同的通訊協定以及感應器。為了減少功率消耗以及面積，此數位處理器與其他傳送機類比電路已整合並以台積電0.18微米標準CMOS技術下線驗證。整體傳送機的面積為7.09平方毫米，而數位處理器部分為1.04平方毫米，並在3.3 伏特操作電壓以及32 百萬赫茲工作頻率下有908微瓦的功率消耗。

As embedded system products change with each passing day, designers require a product development strategy that is flexible, fast, and low cost. In this thesis, a programmable embedded platform is proposed and our target is to design and implement an embedded platform based on a softcore processor. For wearable applications, two OpenCore-based embedded platforms are introduced. One is wearable monitoring system based on openMSP430 for biomedical signal pre-processing, and the other is wireless body area network transmitter based on modified oc8051.
The monitoring system contains an analog front-end for measuring electrocardiography (ECG) and respiration signals, an embedded platform for signals pre-processing, a Bluetooth
for transmitting data and a smart phone for receiving data and displaying pre-processed signals on screen. This embedded platform includes an openMSP430 softcore processor,
some peripherals such as random-access memory (RAM), read-only memory (ROM), general purpose input/output (GPIO), universal asynchronous receiver/transmitter (UART) and serial peripheral interface (SPI). In addition, we use the set of development tools including compiler and assembler for software development. It also provides a methodology of designing openMSP430-based platform and synthesizes openMSP430 core with TSMC 0.18 um 1P6M process technology in this thesis. Under the 20 ns timing constraint, the total area of openMSP430 core including peripherals is 13 k gate counts. The designed platform is also verified and prototyped by Xilinx Spartan-3AN field-programmable gate array (FPGA) with 2,928 Look-Up-Tables (LUTs), 8 kB ROM and 512 B RAM. The monitoring system operates at 50 MHz clock rate and takes 3,732 system clock cycles on signal pre-processing by openMSP430 core. Various transmission baud rates which are 115.2 kbps, 57.6 kbps, 38.4 kbps and 19.2
kbps can be supported by the system. The average power consumption of whole system is 229 mW under 3.3 V operation voltage.
The transmitter for wireless body area network (WBAN) consists of a 2-axis sensor, an analog front-end, an analog-to-digital converter (ADC), a digital-to-analog converter (DAC), a frequency synthesizer, a power amplifier and a digital core. The digital core is a modified oc8051 which is programmable for supporting multi-standard communication protocols in WBAN. For improving performance and reducing size, the designed transmitter is tapped out to a mixed-signal chip with TSMC 0.18 um 1P6M process technology. The total area of the chip is 7.09 mm2 and the digital core only accounts for 1.04 mm2. The power consumption of digital core is 908 uW under 1.2 V operation voltage and at 32 MHz clock rate.

Abstract i
1 Introduction 1
1.1 Background . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
1.2 Motivation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2
1.3 Main Contributions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3
1.4 Organization . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
2 Overview of Soft Processors for Embedded System and Its Applications 5
2.1 Processors in Embedded Systems . . . . . . . . . . . . . . . . . . . . . . . . 5
2.2 A Survey of Soft Processors . . . . . . . . . . . . . . . . . . . . . . . . . . 6
2.2.1 Commercial Core . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
2.2.2 Open-Sourc Core . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
2.2.3 Comparison of soft processors . . . . . . . . . . . . . . . . . . . . . 8
2.3 Applications of Embedded System Platform . . . . . . . . . . . . . . . . . . 9
2.4 Proposed Embedded System Platform . . . . . . . . . . . . . . . . . . . . . 10
3 openMSP430-based Embedded Platform Design Methodology 11
3.1 openMSP430 Microprocessor . . . . . . . . . . . . . . . . . . . . . . . . . 11
3.1.1 Structure of openMSP430 Design . . . . . . . . . . . . . . . . . . . 11
3.1.2 Instruction Set and Addressing Modes . . . . . . . . . . . . . . . . . 12
3.2 Memory Configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
3.2.1 Memory Interface . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
3.2.2 Memory Mapping . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
3.3 Software Development . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
3.3.1 Development Environment and Tools . . . . . . . . . . . . . . . . . 19
3.3.2 MSPGCC Toolchain . . . . . . . . . . . . . . . . . . . . . . . . . . 19
3.3.3 Co-simulation Flow . . . . . . . . . . . . . . . . . . . . . . . . . . 21
3.3.4 Multiplication Operation . . . . . . . . . . . . . . . . . . . . . . . . 23
3.4 ASIC Implementation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23
4 Embedded Platform for Biomedical Signal Pre-Processing ofWearable Monitoring
System 27
4.1 Biomedical Signals . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28
4.1.1 Electrocardiography . . . . . . . . . . . . . . . . . . . . . . . . . . 28
4.1.2 Respiration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29
4.2 Pre-Processing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29
4.3 System Architecture . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30
4.3.1 Analog Front-End . . . . . . . . . . . . . . . . . . . . . . . . . . . 31
4.3.2 Serial Peripheral Interface (SPI) . . . . . . . . . . . . . . . . . . . . 32
4.3.3 Quantization . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32
4.3.4 Softcore Microprocessor . . . . . . . . . . . . . . . . . . . . . . . . 34
4.3.5 Wireless Transmission . . . . . . . . . . . . . . . . . . . . . . . . . 36
4.4 Firmware Design . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 36
4.5 Verification and Simulation Results . . . . . . . . . . . . . . . . . . . . . . . 39
4.5.1 Verification Environment . . . . . . . . . . . . . . . . . . . . . . . . 39
4.5.2 Simulation Results . . . . . . . . . . . . . . . . . . . . . . . . . . . 40
4.6 FPGA Prototype . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 44
4.6.1 Experimental Results . . . . . . . . . . . . . . . . . . . . . . . . . . 44
4.6.2 System Power Analysis . . . . . . . . . . . . . . . . . . . . . . . . . 47
4.7 Comparison with Related Studies . . . . . . . . . . . . . . . . . . . . . . . . 50
5 SoC Design of Low Power Transmitter for Wireless Body Area Network 53
5.1 System Architecture . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 53
5.1.1 Transmitter Circuits . . . . . . . . . . . . . . . . . . . . . . . . . . 54
5.1.2 Sensor Node . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 55
5.2 Digital Baseband Core Based on oc8051 . . . . . . . . . . . . . . . . . . . . 55
5.2.1 Hardware Design . . . . . . . . . . . . . . . . . . . . . . . . . . . . 55
5.2.2 Firmware Design . . . . . . . . . . . . . . . . . . . . . . . . . . . . 57
5.3 ASIC Implementation and Results . . . . . . . . . . . . . . . . . . . . . . . 58
5.3.1 Cell-Based Design Flow in Mixed-Signal SoC . . . . . . . . . . . . 58
5.3.2 Simulation Results . . . . . . . . . . . . . . . . . . . . . . . . . . . 59
5.3.3 Implementation Results . . . . . . . . . . . . . . . . . . . . . . . . 62
5.4 Comparison with Related Studies . . . . . . . . . . . . . . . . . . . . . . . . 64
6 Future Work and Conclusion 65
6.1 Future Work . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 65
6.2 Conclusion . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 66

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