為了有效率地研究高分子材料的電子性質，我們使用了不需要蒸鍍設備的有機場效電晶體製備系統，在此系統，我們使用導電高分子(PEDOT:PSS)作為閘極材料。本製程在非無塵室的一般大氣環境下製備完成，因此我們選擇具有高穩定性的PCPDTBT作為主動層。我們研究了數種製程步驟以最佳化此製程。使用此製程下，得到最佳的PCPDTBT載子移動率為4.32 × 10-4 cm2 V-1 s-1，開關電流比為102~103，門檻電壓為-4 V。此元件使用了氫氧化鈉溶液處理過的ITO作為基板，並使用HMDS進行表面修飾，使用10 mg mL-1的PCPDTBT氯苯溶液以2500rpm的轉速旋轉塗佈成主動層，並對介電層進行105 oC的退火處理。PCPDTBT和PMMA的表面相型態也經由原子力顯微鏡進行分析。我們也使用此最佳化的製程製備不同的高分子主動層的原件。元件結果得到P3HT最佳載子移動率為4.59 × 10-2 cm2 V-1 s-1，F8T2最佳載子移動率為2.47 × 10-4 cm2 V-1 s-1。此製程可以使用簡單的溶液製程取代蒸鍍製程以減少製備元件所需的時間與成本。

In order to realize electrical properties of new polymers quickly, we demonstrated a vacuum evaporation-free OFETs fabrication system comprising conducting polymer, poly(3,4-ethylenedioxythiophene):poly(styrenesulfonate) (PEDOT:PSS) as gate electrode material. All fabrication procedures were completed under ambient condition without clean room or glove box. Thus poly[4,4- bis(hexadecyl)-4H-cyclopenta[2,1-b;3,4-b’]dithiophene-2,6-diyl-alt-2,1,3-benzothiad-iazole-4,7-diyl] (PCPDTBT) was initially selected as a semiconductor material because of its stability. In order to optimize the fabrication procedure, various fabrication conditions were investigated. The best device for PCPDTBT showed hole mobility of μsat = 4.32 × 10-4 cm2 V-1 s-1 with on/off current ratio of 102~103 and threshold voltage of -4 V. This was obtained by NaOH treatment of a patterned ITO glass substrate, without annealing of the ITO, HMDS treatment for ITO, preparation of PCPDTBT layer by spin coating at 2500 rpm from its chlorobenzene solution with a concentration of 10 mg mL-1, without annealing of PCPDTBT, and annealing of poly(methylmethacrylate) (PMMA) layer at 105 C. Morphology of PCPDTBT and PMMA surfaces was analyzed by atomic force microscopy. The optimum condition was applied to other semiconducting polymers, poly(3-hexylthiophene) (P3HT) and poly(9,9-dioctylfluorenyl-2,7-diyl-co-bithiophene) (F8T2), showing the best hole mobilities of 4.59 × 10-2 cm2 V-1 s-1 and 2.47 × 10-4 cm2 V-1 s-1, respectively. A comparison between our method and conventional method has been discussed. This method can be applied to initial screening of semiconducting polymers because the simple solution process reduces fabrication time and cost, without using an expensive evaporator, gold, or silicon wafer substrates.

Table of contents
Abstract I
中文摘要 II
Table of contents III
Chapter 1. Introduction 1
1.1. Introduction 1
1.2. Device structure of OFET 1
1.2.1. Substrate 2
1.2.2. Semiconductor layer 3
1.2.3. Dielectric layer 6
1.2.4. Electrode 7
1.3. Operation theory of OFET 9
1.4. Parameter of OFET 10
1.4.1. Mobility 10
1.4.1. Threshold voltage (VTh) 12
1.4.2. On/off current ratio (Ion/off) 12
1.5. Fabrication method 12
1.5.1. Vacuum evaporation 13
1.5.2. Solution-processed deposition 13
1.6. The aim of this work 13
Chapter 2. Fabrication and characterization of all solution-processed OFET 15
2.1. Introduction 15
2.2. Fabrication procedure 16
2.3. Optimization of Fabrication 19
2.4. Comparison with conventional fabrication method 41
2.5. OFET devices fabricated via all solution processes with various polymers 42
Chapter 3. Conclusions 47
Chapter 4. Experimental section 48
4.1. Materials 48
4.2. Equipment 48
4.3. Preparation of solutions 49
4.4. Cleaning procedure of substrates 50
4.5. Fabrication of OFET 51
4.6. Characterization of OFET 52
4.7. Atomic force microscopy 52
References: 53

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