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作者(中文):李卿瑋
論文名稱(中文):鍺基板上利用固相磊晶的方式形成磊晶的錫化鍺並應用在低於1奈米等效氧化層厚度的金氧半元件
論文名稱(外文):Epitaxial GeSn Formed on Ge Substrate by Solid Phase Epitaxy and Its Application to MOS Devices with Sub-nm EOT
指導教授(中文):巫勇賢
口試委員(中文):高瑄苓
鄭淳護
學位類別:碩士
校院名稱:國立清華大學
系所名稱:工程與系統科學系
學號:101011572
出版年(民國):103
畢業學年度:102
語文別:中文
論文頁數:49
中文關鍵詞:磊晶錫化鍺鍺基板表面平坦度等效氧化層厚度漏電流
外文關鍵詞:epitaxial GeSnGe substratesurface roughnessEOTleakage current
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經由固相磊晶的技術,我們沉積一層非晶的錫化鍺薄膜且經過550度的快速熱退火後,可以成功在鍺基板上形成磊晶的錫化鍺。在退火之前,我們必須覆蓋一層二氧化矽在非晶的錫化鍺上,這是因為防止退火時錫在錫化鍺表面發生沉澱,所以我們藉由降低錫原子的表面遷移率,而得到平滑的表面結構。在物性分析方面,我們從TEM、EDS、XRD以及AFM上得知磊晶的錫化鍺薄膜擁有單晶的結構、均勻的厚度及成分以及很小的表面粗糙度(RMS = 0.56 nm),證明此為一高品質的薄膜。而從XPS的分析上,可看出利用HF/HCl的混合溶液即可去除錫化鍺表面的錫氧化物,進而可製作出氧化層為Yb2O3的MOS電容,且等效氧化層厚度只有0.55 nm。在電性分析方面,因為電容的磁滯小到幾乎可忽略,可得知Yb2O3裡的缺陷很少。我們也量測到在很小的EOT時,閘極的漏電流只有0.4 A/cm2,證明了使用Yb2O3當作閘極氧化層是可行的。總之,根據先前介紹的特點,相信利用此方法製作出的磊晶錫化鍺將有益於高效能錫化鍺MOS元件的實現。
總目錄
摘要…………………………………………………………………………………………......i
Abstract……………..……………………………………….…………...……...ii
致謝………………………………………………………….………………...……………..iii
總目錄…………………………………………………………………………..………..…. iv
表目錄…………………………………………………………………..…...………....vi
圖目錄…………………………………………………………………………..…....….vii

第一章 序論…………………………………………………………………………………...1
1-1 研究背景………………………….…………………………………………....1
1-2 GeSn能帶機制.……………………………………………………………...2
1-3 介面層……………………………………………………….....………..….3
1-4 研究動機……………………………………………..…………………………….4
1-5 論文結構………………………………………………………………..…..….4

第二章 文獻回顧
第一部份:錫化鍺不同的製程方式及其優缺點………………………………………….10
2-1 以分子束磊晶法製作GeSn..............................................10
2-2 以化學氣相沉積法製作GeSn…………………………...………………………..11
2-3 以固相磊晶法製作GeSn……………………………………………..…..………..12
第二部份:錫化鍺介面鈍化之方式
2-4 以氧化鍺為基礎的介面層-GeSnOx……………………………..................................…..20

第三章 結果與討論
錫化鍺電容元件及以Yb2O3作為介電層之研究…………………………………………..24
3-1 TaN/Yb2O3/GeSn/Ge MOS元件之製作………………………….......…24
3-2 TaN/Yb2O3/GeSn/Ge元件之特性討論……………………………………..…..25
3-2-1 穿透式電子顯微鏡分析…………………………………………….......…....25
3-2-2 X射線繞射分析……………………………………………………………...........26
3-2-3 原子力顯微鏡分析…………………………………………………………..........26
3-2-4 X射線光電子能譜分析…………………………….……………...............................................27
3-2-5 電容特性分析…………………………………………………………...….........28
3-2-6 電流特性分析………………………………………………………………...........29
3-2-7 磁滯現象分析…………………………………………………………………..........29

第四章 結論與未來展望……………………………………...………………………........42
參考文獻.........................................................................................................................................................................44
第一章
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[1.3] S. Gupta, B. Vincent, B. Yang, D. Lin, F. Gencarelli, J.-Y. J. Lin, R. Chen1, O. Richard, H. Bender, B. Magyari-Köpe, M. Caymax, J. Dekoster, Y. Nishi, and K. C. Saraswat, “Towards high mobility GeSn channel nMOSFETs: improved surface passivation using novel ozone oxidation method,” in Proc. IEEE IEDM, pp. 375-378, 2012.
[1.4] G. Han, S. Su, L. Wang, W. Wang, X. Gong, Y. Yang, Ivana, P. Guo, C. Guo, G. Zhang, J. Pan, Z. Zhang, C. Xue, B. Cheng, and Y. C. Yeo, “Strained germanium-tin (GeSn) n-channel MOSFETs featuring low temperature N+/P junction formation and GeSnO2 interfacial layer,” in Proc. Symp. VLSIT, pp. 97-98, 2012.
[1.5] S. Gupta, Y. C. Huang, Y. Kim, E. Sanchez, and K. C. Saraswat, “Hole mobility enhancement in compressively strained Ge0.93Sn0.07 pMOSFETs,” IEEE Electron Device Lett., vol. 34, no. 7, pp. 831-833, 2013.
[1.6] L. Wang, S. Su, W. Wang, X. Gong , Y. Yang, P. Guo, G. Zhang, C. Xue, B. Cheng, G. Han, Y. C. Yeo, “Strained germanium–tin (GeSn) p-channel metal-oxide-semiconductor field-effect-transistors (p-MOSFETs) with ammonium sulfide passivation,” Solid-State Electronics, vol. 83, pp. 66-70, 2013.
[1.7] S. Gupta, R. Chen, B. M. Kope, H. Lin, B. Yang, A. Nainani, Y. Nishi, J. S. Harris,
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[1.8] Y. Yang, G. Han, P. Guo, W. Wang, X. Gong, L. Wang, K. L. Low, and Y. C. Yeo, “Germanium–tin p-channel tunneling field-effect transistor: device design and technology demonstration,” IEEE Trans. Electron Devices, vol. 60, no. 12, pp. 4048-4056, 2013.
[1.9] R. R. Lieten, J. W. Seo, S. Decoster, A. Vantomme, S. Peters, K. C. Bustillo,
E. E. Haller, M. Menghini, and J.-P. Locquet, “Tensile strained GeSn on Si by solid phase epitaxy,” Appl. Phys. Lett., vol. 102, no. 5, p. 052106, 2013.
[1.10] S. Gupta, R. Chen, B. Vincent, D. H. C. Lin, B. Magyari-Köpea, M. Caymax, J. Dekoster, J. Harris, Y. Nishi, and K. C. Saraswat, “GeSn Channel n and p MOSFETs” ECS Trans, vol. 50, no. 9, pp. 937-941, 2012.
[1.11] Y. Kamata, Y. Kamimuta, T. Ino, and A. Nishiyama, “Direct comparison of ZrO2 and HfO2 on Ge substrate in terms of the realization of ultrathin high-k gate stacks,” Jpn. J. Appl. Phys., vol. 44, p. 2323, 2005.
[1.12] Y. H. Wu, L. L. Chen, W. C. Chen, C. C. Lin, M. L. Wu, and J. R. Wu, “MOS devices with tetragonal ZrO2 as gate dielectric formed by annealing ZrO2/Ge/ZrO2 laminate,” Microelectron. Eng., vol. 88, p. 1361, 2011.
[1.13] Y. Liu, S. Shen, L. J. Brillson, and R. G. Gordon, “Impact of ultrathin Al2O3 barrier layer on electrical properties of LaLuO3 metal-oxide-semiconductor devices,” Appl. Phys. Lett., vol. 98, p. 122907, 2011.
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第二章
[2.1] G. Han, S. Su, C. Zhan, Q. Zhou, Y. Yang, L. Wang, P. Guo, W. Wei, C. P. Wong, Z. X. Shen, B. Cheng, and Y. C. Yeo, “High-mobility germanium-tin (GeSn) p-channel MOSFETs featuring metallic source/drainand sub-370 °C process modules,” in Proc. IEEE IEDM, pp. 402-404, 2011.
[2.2] M. Zhao, R. Liang, J. Wang, and J. Xu, “Effects of sulfur passivation on Ge/GeSn MOS capacitors with HfO2 gate dielectric,” in Abstract 224th ECS meeting, 2013.














第三章
[3.1] R. R. Lieten, S. Decoster, M. Menghini, J. W. Seoc, A. Vantommea, and J.-P. Locquet, “Single crystalline GeSn on silicon by solid phase crystallization” ECS Trans, vol. 50, no. 9, pp. 915-920, 2012.
 
 
 
 
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