由於快閃記憶體具備資料可重複地讀寫、長時間之資料保存能力之優點，不僅可使用於程式碼之儲存，近年來已廣泛應用於數位相機、手機及其他個人隨身電子產品之資料儲存媒體。但在現今以省電低耗能的趨勢下，操作電壓也必須隨之降低，因此通常會需要降低元件的穿隧氧化層厚度來降低操作電壓與提升操作速度，但這同時也會影響到元件的特性以及造成可靠度的問題。
在此研究中，我們使用ZnO和NiO堆疊的結構來取代一般記憶體的電荷儲存層。其中ZnO此材料由於傳導帶位置低，可以增加寫入時的穿隧電流以利電子進入儲存層，並且防止儲存的電荷由穿隧氧化層流失，而NiO則提供了許多的缺陷來供電荷儲存。另外，由於ZnO和NiO堆疊會形成一個pn二極體，其二極體的內建電場在寫入時可以防止電子從控制氧化層流向閘極，在抹除時則幫助元件加速電子的排出，以達到小電壓操作。在電性方面，相較於使用單純的ZnO或NiO當電荷儲存層的記憶體，使用ZnO和NiO堆疊形成電荷儲存層的記憶體有著較大的優勢。

摘要.……………………………………………………………………………………….……i
致謝…………………………………………………………………………………………...iii
總目錄........................................................................................................................................iv
圖目錄.....................................................................................................................................vii

第一章 序論………………………………………………………………………………......1
1-1 前言……………………………………………………………………………1
1-2 半導體記憶體簡介……………………………………………………………2
1-3 電阻式記憶體特性介紹………………………………………………………3
1-3-1 記憶窗口與磁滯曲線 …………………..…………………………….4
1-3-2 寫入/抹除/讀取速度與機制………………………………………….6
1-3-3 操作電壓……………………………………………………………….8
1-3-4 可靠度分析………………………………………………………….....8
第二章 文獻回顧及研究動機…............................................................................................15
2-1 Nanocrystals for Silicon-Based Memory Devices……………………............15
2-2 Poly-Si Nanowire Nonvolatile Memory with Nanocrystal Indium–Gallium–Zinc–Oxide Charge-Trapping Layer....................................15
2-3 Novel Dual Layer Floating Gate Structure as Enabler of Fully Planar Flash memory……………………………………………………………………......16
2-4 Novel Charge Trap Devices with NCBO Trap Layers for NVM......................16
2-5 Nonvolatile Memory Effects of NiO Layers Embedded in Al2O3 High-k Dielectrics Using Atomic Layer Deposition…………………………………17
2-6 研究動機……………………………………………………………………17

第三章 實驗流程..................................................................................................................30
3-1 pn二極體之製程流程.....................................................................................30
3-2 雙層電荷儲存層記憶體之製程流程….......................................................31
3-3 單層電荷儲存層記憶體之製程流程….......................................................32
3-4 量測儀器的建立……………………….......................................................32

第四章 實驗結果與討論......................................................................................................36
4-1 退火溫度的決定………………………..........................................................36
4-1-1 二極體的比較………………………………..................................36
4-1-2 雙層電荷儲存層記憶體的比較......................................................37
4-2 電性分析…......................................................................................................37
4-2-1 電容-電壓特性與磁滯量測……………………..………………...37
4-2-2 閘極漏電流量測……………...……………………………………39
4-2-3 資料保存度量測…………………...………………………………39
4-2-4 操作耐用性量測…………………………..………………………40

第五章 結論與未來展望.......................................................................................................50
參考文獻..................................................................................................................................51

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