在許多研究領域都有用到壓縮取樣，而所有壓縮取樣的問題都在追求高速度與完美訊號重建表現。這份論文提出一個支援壓縮取樣多候選向量及免反矩陣運算之投影向量選取正交匹配追蹤處理器。投影向量選取正交匹配追蹤相較於正交匹配追蹤有比較好的訊雜比，但是運算複雜度則是較正交匹配追蹤高。我們提出的演算法化簡了投影向量選取正交匹配追蹤並且沒有任何損失表現。這個硬體架構是設計給長度256的向量輸入訊號，稀疏性為12，64筆量測訊號。這篇論文所提出的處理器是用台積電90奈米製程，時脈為140百萬赫茲，總面積為11.18mm2`，總重建時間為72.25微秒。

Many research fields have the motivation using the compressive sensing. All the CS
problems pursue the high speed (low complexity) and high signal reconstruction per-
formance. This study proposed a projection-based atom selection orthogonal matching
pursuit (POMP) with multiple candidates and matrix inversion bypass (MCMIB) al-
gorithm. The POMP has better signal-to-noise ratio (SRNR) performance than the
orthogonal matching pursuit (OMP) algorithm, but the computational complexity of
the POMP is extremely high. This algorithm greatly simplified the computational com-
plexity of the POMP algorithm without loss any SRNR performance. The architecture
is designed for the 256-length input vector with sparsity 12, and 64 measurement data.
The proposed processor is implemented by TSMC 90nm 1P9M CMOS technology. The
clock frequency is 140MHz, and the chip area is 11.18mm 2 . The total reconstruction
time is 72.25 µs.

1. Introduction
1.1 Compressive Sensing
1.2 Research Motivation
1.3 Organization of This Thesis
2 Reconstruction Algorithms for Compressive Sensing
2.1 Signal Model of Compressive Sensing
2.2 Orthogonal Matching Pursuit (OMP) Algorithm
2.3 Projection-Based Atom Selection Orthogonal Matching Pursuit (OMP) Algorithm
2.4 Orthogonal Matching Pursuit (OMP) via Matrix Inversion Bypass Algorithm
3 Proposed Projection-based Atom Selection with Multi-Dimension Matrix Inversion Bypass Algorithm
3.1 Projection-based Atom Selection with Multi-Dimension Matrix Inversion Bypass Algorithm
3.2 Complexity Analysis
3.2.1 Orthogonal Matching Pursuit Algorithm
3.2.2 Projection-Based Atom Selection OMP Algorithm
3.2.3 OMP via Matrix Inversion Bypass Algorithm
3.2.4 Proposed Algorithm
3.3 Simulation and Performance Analysis
3.3.1 Environment Parameter Setup
3.3.2 Experiment Results
4 Architecture Design
4.1 System Architecture
4.2 Initial Warm-up Circuit
4.3 8x8 Matrix Inversion
4.3.1 2x2 Matrix Inversion
4.3.2 2x2 and 4x4 Matrix Multiplication
4.3.3 4x4 and 8x8 Matrix Inversion
4.4 Index Selection Circuit
4.5 Timing Schedule
4.6 Fixed-point Simulation
5 Implementation Results
5.1 Design Flow
5.2 Pre-synthesis Design and Verification
5.3 Synthesis Result
5.4 Post-layout Result
5.5 Comparison
6 Conclusion

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