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作者(中文):林淯晟
作者(外文):Lin, Yu-Cheng
論文名稱(中文):新型邏輯相容水平導通電橋記憶體
論文名稱(外文):A New Lateral Conductive Bridge Random Access Memory by Fully CMOS Logic Compatible Process
指導教授(中文):林崇榮
金雅琴
指導教授(外文):Lin, Chrong-Jung
King, Ya-Chin
口試委員(中文):蔡銘進
口試委員(外文):Tsai, Ming-Jinn
學位類別:碩士
校院名稱:國立清華大學
系所名稱:電子工程研究所
學號:100063546
出版年(民國):102
畢業學年度:101
語文別:中文
論文頁數:49
中文關鍵詞:新型邏輯相容水平導通電橋記憶體
外文關鍵詞:A New Lateral Conductive Bridge Random Access Memory by Fully CMOS Logic Compatible Process
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隨著可攜式電子產品的普及,對資料儲存產品的需求越來越大。快閃記憶體是非揮發性記憶體在這產業的主流,然後許多的物理上極限使得快閃記憶體的微縮有極大的困難,而新型記憶體中,電阻式記憶體最有機會取代快閃記憶體。
電阻式記憶體與導通電橋式記憶體大多使用邏輯製程不相容的材料,要應用到電路中還需要與製程做整合。本篇論文提出完全使用CMOS製程的新型的側向導通電橋記憶體,記憶節點在contact與poly之間的W/TiN/Ti/poly si水平結構,初始狀態沒有絕緣層的結構可以確定以鈦金屬飄移的轉換機制,雙極性的電阻轉換提供大於10倍的高低阻值比。設置使用1.5V電壓能在50ns內完成操作,重置在-1V的電壓下要5ms的轉態;元件可靠度的方面,讀取干擾能夠確保在10k秒內0.3V不會影響到高阻值態與低阻值態;可以有1k次的設置/重置循環操作;元件在125∘C的環境下能夠保存資料超過1,000個小時而不發生變化。最後使用多晶矽二極體來防止潛行電流,實現一個不做在矽基板上的1D1R結構。良好的操作特性與長時間的可靠度讓創新的LCBRAM可於內嵌多次寫入記憶體的應用。
The requirement of data storage increases with the portable products application. The flash memory dominates the NVM market recently. But the enormous scaling difficulty is countered with physical limit of flash memory. ReRAM is proposed to instead of flash memory in the future.
Most of ReRAM and CBRAM are fabricated by the materials which are not compatible with CMOS procces. It is need to be integrated to the CMOS process for the applications. This study proposed a novel fully-logic compatible lateral conductive bridge random access memory. The W/TiN/Ti/poly si memory node is the sidewall structure between poly-si and a CMOS regular contact plug . The Ti-atomic switch mechanism is confirmed by the non-insulator layer structure. The 10 HRS/LRA window is maintained by bipolar switching of LCBRAM . The state switches in 50ns/1.5V set operation and in 5ms/-1V reset operation. The data is not disturbed in 10,000 second by 0.3V read condition. And state can sustain in 1,000 set/reset pulse cycles. No obvious state changes over 1,000 hours amd 125∘C baked. A poly diode is used to prevent the sneak current for 1D1R structure beyond the silicon bulk. Finally, the proposed new cell is a very promising solution for future embedded MTP applications.

摘要
Abstract
內文目錄
圖目錄
表目錄
第一章 導論
1. 1非揮發性記憶體現況
1. 2論文大綱
第二章 電阻式記憶體與導電橋式記憶體回顧
2.1電阻式記憶體
2.1.1 結構與電阻轉換機制
2.1.2 電極與絕緣層材料
2.2導電橋接記憶體
2.2.1 結構與轉換機制
2.2.2 電極與電解質材料
2.3 選取技術介紹
2.4小結
第三章 新型側向導電橋接記憶體
3.1元件設計與製作
3.1.1元件結構
3.1.2元件製程
3.2元件操作機制
3.3元件基本特性
3.3.1 低阻值態與高阻值態電流分析
3.3.2設置/重置電壓電流特性分析
3.3.3 設置(set)限流分析
3.3.4 元件操作速度分析
3.4元件可靠度
3.4.1讀取干擾分析
3.4.2元件耐久度分析
3.4.3資料保存性分析
3.5小結
第四章 使用多晶矽二極體選擇器的新型記憶體陣列
4.1多晶矽二極體
4.2 1D1R記憶體單元與陣列
4.3小結
第五章 總結
參考文獻
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