時脈信號在現今的電子產品中扮演著不可或缺的角色，不論是通訊、儀器或者是智慧型手機都需要時脈產生電路才能正常運作。這些時脈電路必需藉由石英振盪器這個參考頻率源才能產生時脈。然而石英晶體振盪器擁有大面積、高功率消耗、無法與CMOS製程相容等缺點，因此過去三十年來各界學者專家都試圖尋找能替代石英振盪器的方案。
近年來被提出的解決方法有MEMS振盪器、QMEMS振盪器、LC振盪器以及具有電壓回授控制之弛張振盪器。但是MEMS、QMEMS等方法無法與CMOS電路整合；LC振盪器消耗功率過大；弛張振盪器無法避免因製程變異所導致內部電路不匹配、責任週期不為50%的問題。因此我們致力於研製以CMOS標準製程實現低功率消耗、具備精準責任週期之參考頻率源。
在本篇研究當中，我們透過將兩組充放電路徑簡化為一組路徑的方式來解決電路不匹配的問題，並且藉由加上一個除頻電路增進責任週期的精準度。此晶片使用 TSMC 0.18 μm 1P6M標準製程實現，模擬與量測結果皆顯示出此振盪器輸出波形之責任週期可精準的達到50%，達成節省面積、低功率消耗、能與CMOS整合並且具備精準責任週期之參考頻率源。

Clock signal plays an important role in nearly all consumer electronics. Electronic platforms ranging from communications, instruments to smart phone need clock generation to work properly. Additionally, most of these circuits require crystal oscillators (XO) serving as the frequency reference. Nevertheless, quartz crystal possesses some disadvantages such as large area, high power consumption and cannot be integrated into microelectronic process technology. For these reasons, researchers had been devoting themselves to exploiting technologies to replace quartz over the past thirty years.
Recently, several methods have been proposed to solve above mentioned problems, including MEMS oscillators (MOs), QMEMS, LC oscillators and relaxation oscillator with voltage average feedback circuits. However, MOs and QMEMS remain the challenge in process integration; LC oscillators consume too much power and chip area; relaxation oscillator is subject to mismatch caused by manufacturing process which would induce inaccurate duty cycle. Considering these defects collectively, we aimed to develop an integrated frequency source with accurate duty cycle and low power consumption.
In this paper, we proposed a method to avoid mismatch in relaxation oscillator, that is, to simplify the two charging and discharging paths as one single path. Furthermore, we improved the accuracy of duty cycle by employing a divider in the oscillator. The chip in this work was fabricated in the TSMC 0.18 μm 1P6M process. Both of the simulation and measurement results show that such approach efficiently enhances the accuracy of duty cycle to 50%, achieves small chip area and low power dissipation, and can be realized with standard CMOS processes.

摘要 i
Abstract ii
致謝 iii
目錄 iv
圖片目錄 vii
表格目錄 xi
第一章 緒論 1
1.1 研究背景 1
1.2 研究動機 2
1.3論文章節架構 3
第二章 研究背景與理論 4
2.1 石英振盪器簡介 4
2.1.1石英晶體諧振器 5
2.1.2振盪電路 7
2.1.3石英晶體振盪器 7
2.2 石英晶體振盪器的效能限制 8
2.3 市場中石英振盪器的取代方案 9
2.3.1微機電振盪器(MEMS Oscillator) 10
2.3.2 Quartz MEMS(QMEMS) 11
2.3.3全矽振盪器(CMOS Oscillator) 11
2.4 CMOS振盪器的優勢 12
第三章 CMOS振盪器 13
3.1 CMOS振盪器簡介 13
3.1.1線性振盪器 13
3.1.2非線性振盪器 14
3.2重要參數定義 15
3.3頻率變異來源 17
3.4 CMOS振盪路之文獻探討與比較 19
3.4.1市售之射頻 LC振盪器電路探討 19
3.4.2電壓回授之弛張振盪電路 21
第四章 具精準責任週期的參考振盪器 24
4.1系統架構概述 24
4.2電壓回授路徑的運作原理 26
4.2.1控制電壓(VH)與頻率的關係 26
4.2.2頻率與平均電壓值(Vosc,dc)之關聯性 26
4.2.3以低通濾波器實現電壓回授控制電路(VAF) 27
4.3振盪器的設計 29
4.3.1 CMOS振盪器之架構選擇 29
4.3.2振盪器運作機制 30
4.4與供應電壓無關的振盪器 32
4.5振盪器各個子電路設計 33
4.5.1電壓回授路徑(Voltage Average Feedback)的設計 33
4.5.2運算放大器(Operational Amplifier)的設計 34
4.5.3比較器(Comparator) 36
4.5.4充放電路徑 37
4.5.5除頻器 38
4.5.6 ¯SR NAND Latch 39
4.5.7固定轉導偏壓(Constant-Gm Biasing) 39
第五章 模擬結果與晶片實現 41
5.1設計流程 41
5.2子電路之模擬結果 43
5.3 Reference Oscillator整體電路特性 53
5.4晶片佈局考量 63
第六章 量測考量及結果 66
6.1 PCB版的設計與環境架設 66
6.2量測儀器介紹 67
6.3量測方法 69
6.4量測結果 73
6.5問題討論 82
第七章 結論與後續研究建議 86
7.1.結論 86
7.2後續研究建議 86
參考文獻 88

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