本論文描述了一個適合應用於可見光通訊之雙模式操作互補式金氧半導體影像感測器。此影像感測器之雙模式操作為影像模式及通訊模式。此論文貢獻了許多創新之處，首先是提出了可提供雙模式操作之四個電晶體的畫素架構。第二為提出一個在通訊模式下可以消除不必要的背景資訊以及避免壓縮輸出電壓容許空間之背景消除技術。第三為提出一個可程式化陣列面積之光感應電流相加方式來增加光感度，而此陣列面積則由所提出之即時追蹤光源功能來決定。
此操作電壓為3.3伏特之雙模式操作互補式金氧半導體影像感測器晶片使用n+/p-sub 感光二極體的64 × 64畫素陣列，每畫素包含四個電晶體，其畫素大小為 10 × 10 um2，填充因子為54.9%，並以TSMC 0.18μm CMOS 1P6M 標準製程製作。本影像感測器晶片的量測結果於影像模式下具1.3V /lux•s感光度之原始影像資訊輸出；於通訊模式下透過所提出之電流相加特性具有1倍至64倍之可調增益光感度，而此光接受器之最佳頻寬為1MHz，位元錯誤率為10-9。
改良式雙模式操作互補式金氧半導體影像感測器晶片使用64 × 64畫素陣列，每畫素包含四個電晶體，其畫素大小為 7.6 × 7.6 um2，填充因子為45%，操作電壓為3.3伏特，並以TSMC 0.18μm CMOS 1P6M 標準製程製作。本改良式影像感測器晶片的量測結果於影像模式下具1.136V /lux•s感光度及每秒120張影像輸出，功率消耗為1.093mW；於通訊模式下具有每秒5000張資訊輸出之即時追蹤功能，並且在一可靠之背景消除技術之下此光接受器之最佳頻寬為6MHz，位元錯誤率為3.8×10-6。

This thesis presents a dual-mode CMOS image sensor suitable for visible light communication. The dual-mode operation of the proposed imager is image mode and communication mode. There are several innovations in this thesis. First, a compact four transistors pixel structure provides the dual-mode operation. Second, a background cancelling function in communication mode can eliminate the undesired background information and avoid suppressing the output voltage headroom. Third, photo-sensing current summation scheme with a programmable array area is implemented to improve the photo-sensitivity, where the array area is defined by the proposed real-time light source tracking function.
The prototype dual-mode CMOS imager chip consisting of 64 × 64 4-T pixel array with n+/p-sub photodiode and pixel pitch as 10 × 10 μm2 with 54.9% fill factor and 3.3V operation has been designed and fabricated in TSMC 0.18μm CMOS 1P6M standard process. The measured results achieve raw image data output in image mode with 1.3V/lux•s sensitivity, and real-time output in communication mode with tunable gain of photo-sensitivity from ×1 to ×64 by proposed current summation feature and maximum receiver bandwidth of 1MHz with 10-9 bit-error rate, respectively.
The revised dual-mode CMOS imager chip consisting of 64 × 64 4-T pixel array and pixel pitch as 7.6 × 7.6 μm2 with 45% fill factor and 3.3V operation has been designed and fabricated in TSMC 0.18μm CMOS 1P6M standard process. In image mode, the measured results achieve 1.136V/lux•s sensitivity at 120 fps with 1.093mW power consumption. In communication mode, the measured results achieve a real-time tracking with 5000fps tracking rate and maximum receiver bandwidth of 6MHz with 3.8×10-9 bit-error rate with a reliable background cancelling function.

摘要 I
ABSTRACT II
CONTENTS III
LIST OF FIGURES VI
LIST OF TABLES X
CHAPTER 1 INTRODUCTION 1
1.1 MOTIVATION 1
1.2 THESIS CONTRIBUTION 2
1.3 THESIS ORGANIZATION 4
CHAPTER 2 BACKGROUND INFORMATION 5
2.1 REVIEW OF THE IMAGE SENSOR 6
2.1.1 System Architecture 6
2.1.2 Active Pixel Sensor 7
2.1.3 Basic Sensor Characteristics 8
2.1.4 Correlated Double Samplings (CDS) 10
2.2 REVIEW OF THE OPTICAL RECEIVER 11
2.2.1 System Architecture 11
2.2.2 Trans-impedance Amplifier (TIA) 12
2.2.2.1 Open-loop TIA 13
2.2.2.2 Feedback TIA 14
2.2.3 Basic TIA Characteristics 14
2.3 DESIGN CONSIDERATION OF THIS WORK AND SUMMARY 16
2.4.1 In-Pixel Devices 17
2.4.2 Communication Bandwidth 17
2.4.3 Summary 17
CHAPTER 3 3-T APS BASED DUAL-MODE IMAGER FOR IMAGE SENSOR COMMUNICATION 18
3.1 CONCEPT OF DUAL-MODE OPERATION 18
3.1.1 Image Mode Readout Scheme 19
3.1.2 Communication Mode with Current Summation Function Readout Scheme 20
3.2 CHIP IMPLEMENTATION 21
3.2.1 System Architecture 21
3.2.2 Pixel structure 23
3.2.3 Correlated Double Sample (CDS) 26
3.2.4 Trans-impedance Amplifier (TIA) 32
3.2.5. Column and Row Selects 36
3.2.6. Digital Control Circuit 37
3.3 ANALYSIS OF COMMUNICATION MODE 39
3.4 CHIP OPERATION IN IMAGE MODE 41
3.5 SUMMARY 42
CHAPTER 4 REVISED DUAL-MODE IMAGER WITH LIGHT SOURCE TRACKING AND BACKGROUND CANCELLING 43
4.1 OPERATION CONCEPT 44
4.1.1 Light Source Tracking 44
4.1.2 Background Cancelling 45
4.1.3 Current Buffer 47
4.2 CHIP IMPLEMENTATION 47
4.2.1 System Architecture 47
4.2.2 Current Comparator 49
4.2.3 Buffered Direct Injection 53
4.2.4 TIA with Background Current Control 55
4.2.5 Addressing 59
4.2.6 Column and Row Selects 60
4.3 ANALYSIS OF COMMUNICATION MODE 61
4.4 CHIP OPERATION IN IMAGE MODE 63
4.5 SUMMARY 64
CHAPTER 5 MEASUREMENT RESULTS 65
5.1 MEASUREMENT ENVIRONMENT SETUP 65
5.2 3T-APS BASED DUAL-MODE IMAGER FOR VISIBLE LIGHT COMMUNICATION 67
5.2.1 Imager Chip 67
5.2.2 Image Mode Measurement 70
5.2.2.1. Transfer Curve 70
5.2.2.2. Sample Images 71
5.2.3 Communication Mode Measurement 72
5.2.3.1. Real-Time Output 72
5.2.3.2. Current Summation 72
5.2.3.3. Frequency Response 73
5.2.3.4. Bit Error Rate 75
5.2.3.5. Communication Demo 76
5.3 REVISED DUAL-MODE IMAGER WITH LIGHT SOURCE TRACKING AND BACKGROUND CANCELLING 78
5.3.1 Imager Chip 78
5.3.2 Image Mode Measurement 80
5.3.2.1. Transfer Curve 80
5.3.2.2. Sample Images 80
5.3.3 Communication Mode Measurement 82
5.3.3.1 Light Source Tracking 82
5.3.3.2 Background Cancelling 87
5.3.3.3 Frequency Response 87
5.3.3.4 Bit Error Rate 88
5.4 SUMMARY 89
CHAPTER 6 CONCLUSION AND FUTURE WORK 92
6.1. CONCLUSION 92
6.2. FUTURE WORK 94
BIBLIOGRAPHY 95

[1] J. Liu, W. Noonpakdee, H. Takano, and S. Shimamoto, “Foundational Analysis of Spatial Optical Wireless Communication utilizing Image Sensor,” IEEE Conf. on Imaging Systems and Techniques, pp. 205-209, May 2011.
[2] M. S. Rahman, Md. M. Haque and Ki-Doo Kim, “Indoor Positioning by LED Visible Light Communication and Image Sensors,” International Journal of Electrical and Computer Engineering, vol. 1, pp. 161-170, Dec. 2011.
[3] N. Kumar and N. R. Lourenco, “Led-Based Visible Light Communication System: A Brief Survey and investigation,” Journal of Engineering and Applied Sciences, vol. 5, pp. 296-307, 2010.
[4] N. Kumar and N. R. Lourenco, “Led-Based Visible Light Communication System: A Brief Survey and investigation,” Journal of Engineering and Applied Sciences, vol. 5, pp. 296-307, 2010.
[5] Chih-Hao Lin ; Chih-Cheng Hsieh ; Che-Chun Lin and Ren-Jr Chen, “A Dual-Mode CMOS Image Sensor for Optical Wireless Communication,” International Symposium on VLSI Design, Automation & Test (VLSI-DAT), pp. 1-4, 2014.
[6] J. Ohta, “Smart CMOS imager sensors and applications,” CRC Press
[7] P. J. W. Noble, “Self-scanned silicon image detector arrays,” IEEE Trans. Electron Devices, vol. 15, no. 4, pp. 202-209. Apr. 1968.
[8] E. Fossum, “Active pixel sensors: are CCD’s dinosaurs?” proceedings of the SPIE, Charged-Coupled Devices and Solid State Optical Sensors III, vol. 1900, pp. 30-39, 1993.
[9] J. E. Eklund, C. Svensson, and A. Astrom, “VLSI implementation of a focal plane image processor – a realization of the near-sensor image processing concept,” IEEE Trans. Very Large Scale Integration Syst., vol. 4, no. 3, pp. 322-335, Sep. 1996.
[10] R. Guidash, T. H. Lee, P. Lee, D. Sackett, C. Drowley, M. Swenson, L. Arbaugh, R. Hollstein, F. Shapiro, and S. Domer, “A 0.6um CMOS pinned photodiode color imager technology,” Proc. Int. Electron Devices Meeting Tech. Dig., pp. 927-929, Dec. 1997.
[11] A. El Gamal, and H. Eltoukhy, “CMOS image sensors,” IEEE Circuit Devices Mag., vol. 21, no. 3, pp. 6-20, May/Jun. 2005.
[12] N. Koike, I. Takemoto, K. Satoh, S. Hanamura, S. Nagahara, and M. Kubo. “MOS Area Sensor: Part I — Design Consideration and Performance of an n-p-n Structure 484 × 384 Element Color MOS Imager,” IEEE Trans. Electron Devices, 27(8):1682–1687, August 1980.
[13] H. Nabeyama, S. Nagahara, H. Shimizu, M. Noda, and M. Masuda. “All Solid State Color Camera with Single-Chip MOS Imager,” IEEE Trans. Consumer Electron., CE-27(1):40–46, February 1981.
[14] S. Ohba, M. Nakai, H. Ando, S. Hanamura, S. Shimada, K. Satoh, K. Takahashi, M. Kubo, and T. Fujita. “MOS Area Sensor: Part II—Low-Noise MOS Area Sensor with Antiblooming Photodiodes,” IEEE J. Solid-State Circuits, 15(4):747–752, August 1980.
[15] S.E. Holland, N.W. Wang, W.W. Moses, ”Development of low noise, backside illuminated silicon photodiode arrays,” IEEE Transactions on Nuclear Science, Vol. 44, No. 3, June, 1997.
[16] T.A. Kwa, P.M. Sarro, R.F. Wolffenbuttel, “Backside-illuminated silicon photodiode array for an integrated spectrometer,” IEEE Transactions on Electron Devices, Vol. 44, No. 5, May, 1997.
[17] Holland, S.E., et al., 2003, Fully depleted, back-illuminated charge-coupled devices fabricated on high-resistivity silicon, IEEE Trans. Elec. Dev., 50, p. 225-238.
[18] I. M. Hafez, G. Ghibauso, F. Balestra, “A study of flicker noise in MOS transistors operated at room and liquid helium temperatures,” Solid State Electronics, 1990,pp. 1525-1529.
[19] W. V. Backensto, C. R. Viswananathan, “Bias-dependent 1/f noise model of an MOS transistor,” in Proc. IEEE, 1980, pp.87-92.
[20] J. F. Johnson, “Hybrid infrared focal plane signal and noise model,” IEEE Trans. Electron Devices, 1999, pp.96-108.
[21] C. K. Liu, X. H. Yuan, X. H. Zhang, “Fixed pattern noise and its suppression in CMOS ROIC,” Semiconductor Optoelectronics, 2002, pp.170-173.
[22] J.E. Carnes and W.F. Kosonocky, “Noise source in charge-coupled devices,” RCA Review, June 1972, 33(2), pp. 327–343.
[23] B. Tyrrell, R. Berger, C. Colonero, J. Costa, M. Kelly, E. Ringdahl,K. Schultz, and J. Wey, “Design approaches for digitally dominated active pixel sensors: Leveraging Moore’s law scaling in focal plane readout design,” Proc SPIE, Feb. 2008, vol. 6900, pp. 690 00W.
[24] Xiqu Chen, “The noise analysis and its suppression in CMOS ROIC for microbolometric infrared focal plane array,” in Proc. SPIE, November 2008, vol. 7135 713539-8.
[25] Orly Yadid-Pecht, Ralph Etienne-Cummings, “CMOS Imagers From Phototransduction to Image Processing,” KLUWER ACADEMIC PUBLISHERS,2004.
[26] K. Yonemoto, “Fundamentals and Applications of CCD/CMOS Image Sensors,” Q Pub. Co., Ltd., Tokyo, Japan, 2003. In Japanese.
[27] L.W. Huang, “A 1.8V Readout Integrated Circuit with Adaptive Transimpedance Control Amplifier for IR Focal Plane Arrays,” National Tsing Hua University, Oct. 2011.
[28] R. J. Kansy, “An response of a correlated double sampling circuit to 1/f noise,” IEEE Journal of Solid-State Circuit, vol. 15, no. 3, pp. 373-375, Jun 1980.
[29] I. M. Hafez, G. Ghibauso, and F. Balestra, “A study of flicker noise in MOS transistors operated at room and liquid helium temperatures,” Solid State Electronics, pp. 1525-1529, 1990.
[30] W. V. Backensto, and C. R. Viswananathan, “Bias-dependent 1/f noise model of a MOS transistor,” Proc. IEEE, pp. 87-92, 1980.
[31] Behzad Razavi, “Design of Analog CMOS Integrated Circuits,” McGraw-Hill, 2000, Chapter 7: Noise.
[32] Behzad Razavi, “Design of Integrated Circuits for Optical Wireless Communications,” McGraw-Hill, 2003, Chapter 4: Transimpedance Amplifiers.
[33] [Online]. Available:http://en.wikipedia.org/wiki/Intersymbol_interference
[34] B.K.P. Horn, “Robot Vision,” The MIT Press, Cambridge,MA, 1986.
[35] C. C. Hsieh, C. Y. Wu, F. W. Jih, and T. P. Sun, “Focal-Plane Arrays and CMOS Readout Techniques of Infrared Imaging Systems,” IEEE Trans. on Circuits and Systems for Video Tech., 1997, Vol. 7, No. 4, pp. 594-605.
[36] K. Chow, J. P. Rode, D. H. Seib, and J. D. Blackwell, “Hybrid infrared focal-plane arrays,” IEEE Trans. Electron Devices, 1982, vol. 29, no. 1.
[37] A. M. Fowler, R. G. Probst, J. P. Britt, R. R. Joyce, and F. C. Gillett, “Evaluation of an indium antimonide hybrid focal plane array for ground-based infrared astronomy,” Opt. Eng., 1987, vol. 26, pp. 232-240.
[38] N. Bluzer and R. Stehlik, “Buffered direct injection of photocurrents into charge coupled devices,” IEEE Trans. Electron Devices, 1978, vol. 25, no. 2, pp. 160-166.
[39] [Online]. Available:http://www.youtube.com/watch?v=yYNKXoisLIE
[40] Oike, Y., Ikeda, M., & Asada, K., “A smart image sensor with high-speed feeble ID-beacon detection for augmented reality system,” the 29th European Solid‐State Circuits Conf. (ESSCIRC), pp. 125‐128, Sep. 2003.
[41] K. Yamamoto, Y. Maeda, Y. Masaki, K. Kagawa, M. Nunoshita, and J. Ohta, “A CMOS image sensor with high-speed readout of multiple region-of-interests for an Opto-Navigation system. In Proc. SPIE, volume 5667, pages 90–97, San Jose, CA, January 2005.
[42] M. S. Z. Sarker, I. Takai, M. Andoh, K. Yasutomi, S. Itoh, S. Kawahito, “A CMOS imager and 2‐D light pulse receiver array for spatial optical communication,” Proc. of IEEE Asian Solid‐State Circuits Conf., pp. 113‐116, Nov. 2009.
[43] S. Itoh, I. Takai, M. Z. Sarker, M. Hamai, K. Yasutomi, M. Andoh, S. Kawahito, “A CMOS image sensor for 10Mb/s 70m‐range LED‐based spatial optical communication,” IEEE International Solid‐State Circuits Conf. (ISSCC), Dig. Tech. Papers, pp. 402‐403, San Francisco, Feb. 2010.