在最近幾年，多輸入多輸出的技術對於無線通訊來說具有一定的影響，因為它不需要額外的頻寬就可以提供大量的資料傳輸。多輸入多輸出技術有許多實現的方式，其中一種便是使用預先編碼的方式來編碼傳輸端的傳輸資料進而改善資料的穩定傳輸，而達到波束成型的概念。預先編碼矩陣通常可以藉由奇異值分解來產生，但是奇異值分解的所需要的運算複雜度卻非常的高，因為這種線性運算需要涉及大量的矩陣乘法並且反覆地進行疊代運算，因此整體系統的運算上，奇異值分解的演算法的設計是非常重要的。
　　在本篇論文，提出了一個以元素為基底的疊代演算法，並使用此方法將矩陣的運算問題轉換成元素的運算問題，而減少奇異值分解所需要大量的矩陣乘法。這種演算法相對於另一種需要以QR分解來進行奇異值分解的演算法來說，少了更多的矩陣乘法而且複雜度更低，因為QR分解在每個步驟都有大量的矩陣乘法。本論文所提出的演算法分成三個主要步驟，分別是是預先處理、慣性特徵值逼近法和三對角分解特徵向量方法。在第一個步驟中的預先處理，會先將矩陣進行三對角化，如此可以減少後續的疊代運算；第二步驟是慣性特徵值逼近法，將已經三對角化的矩陣進行反遞迴的分解和利用矩陣的慣性原理來獲得特徵值；最後是三對角分解特徵向量方法，將所估算的特徵值帶回三對角矩陣配合三對角演算法進行分解。此演算法的架構上是可以組合的，可將維度較小的矩陣分解結果組合成較大的矩陣分解結果。我們使用此演算法來實現16X16維度的奇異值分解運算並且比較使用QR分解來進行奇異值分解來說有將近節省70%的運算複雜度。
　　我們同時將此演算法設計成硬體電路，並且藉由國家晶片中心所提供的90奈米製程技術來實現實體的晶片電路。我們所完成的晶片設計可以操作在100百萬赫茲的運作頻率而其中的消耗功率為22.9毫瓦特。我們的設計每秒可以分解137千個8X8維度的矩陣，其中分解的結果的標準均方差可達10的-4次方。

In recent years, multiple-input multiple-output (MIMO) technology has attracted attention in wireless communications, because it offers significant increases in data throughput and link range without additional bandwidth.
One of the MIMO techniques uses the pre-coding to adjust the transmitted signal to improve the data reliability and the most widely used technique today is using singular value decomposition (SVD) to generate the pre-coding matrix.
However, the computational complexity of SVD is significantly high due to the matrix multiplications and iterative characteristic.

In this thesis, we present a new element-based iterative, high accurate and low cost singular value decomposition (SVD) algorithm. A new element-based iterative algorithm which with less iterative number of matrix multiplication than QR-based SVD algorithm and matrix's multiplication-based iterative algorithm. The proposed SVD algorithm can be separated into three stages. They are preprocessing, eigenvalue approximation by law of inertia (EALOI) and computing the eigenvectors with tri-diagonal matrix algorithm (CETDMA). The proposed SVD is scalable architecture, so that means a 16X16 SVD can combined by results of 8X8 SVD. Saving 70% complexity in 16X16 matrix compared with QR-based SVD. Based on element's iterative multiplication reduces the complexity efficiently, which support a larger size matrix with 8X8 and 16X16. We verify the proposed design by using the VLSI implementation with CMOS 90 nm technology. The post-layout result of the design has the feature of 0.887X0.887 (mm^2) core area and 22.9mW power consumption at 100MHz operating frequency. Our design can achieve 137k channel matrices (8X8)/s, and NMSE can achieve 10^(-4) and can be extended to deal with different transmit and receive antenna sets.

1 Introduction 2
1.1 Multiple Input Multiple Output . . . . . . . . . . . . . . . . . . . . 2
1.2 Singular Value Decomposition . . . . . . . . . . . . . . . . . . . . . 2
1.3 Motivation of the Thesis . . . . . . . . . . . . . . . . . . . . . . . . 5
1.4 Organization of the Thesis . . . . . . . . . . . . . . . . . . . . . . . 5
2 Review of Prior SVD Algorithms 6
2.1 Modified Gram-Schmidt(MGS) QRD-Based SVD Algorithm . . . . 7
2.1.1 Bi-diagonalization . . . . . . . . . . . . . . . . . . . . . . . . 7
2.1.2 Diagonalization . . . . . . . . . . . . . . . . . . . . . . . . . 7
2.1.3 Modified Gram-Schmidt QR Decomposition . . . . . . . . . 8
2.1.4 Inverse Transformation . . . . . . . . . . . . . . . . . . . . . 8
2.2 Golub-Kahan(GK) SVD Algorithm . . . . . . . . . . . . . . . . . . 10
2.2.1 Reduction to Bi-diagonal Form . . . . . . . . . . . . . . . . . 10
2.2.2 Singular Value Decomposition of the Bi-diagonal Matrix . . . 11
2.3 Iterative Super-linear-Convergence SVD Algorithm [4] . . . . . . . . 13
2.3.1 Initial Matrix . . . . . . . . . . . . . . . . . . . . . . . . . . 13
2.3.2 Iterative . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
2.3.3 Deflation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
2.3.4 Left Singular Vector and Singular Value Matrix Derivation . 14
2.4 Summary of Prior SVD Algorithms . . . . . . . . . . . . . . . . . . 15
3 Proposed SVD Algorithm 16
3.1 Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
3.2 Pre-processing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
3.2.1 Householder Transformation . . . . . . . . . . . . . . . . . . 17
3.2.2 Tridiagonal Hermitian Matrix . . . . . . . . . . . . . . . . . 18
3.3 A Divide-and-Conquer Algorithm . . . . . . . . . . . . . . . . . . . 20
3.3.1 Tridiagonal Hermitian Eigenproblem . . . . . . . . . . . . . 20
3.3.2 Dividing the Matrix . . . . . . . . . . . . . . . . . . . . . . 21
3.3.3 Spectral Decomposition of A Symmetric Arrowhead Matrix . 21
3.3.4 Computing the Eigenvectors of A Symmetric Arrowhead
Matrix . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24
3.4 Eigenvalue Approximation by Law of Inertia (EALOI) . . . . . . . 26
3.4.1 Motivation . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26
3.4.2 Sylvester's Law of Inertia . . . . . . . . . . . . . . . . . . . 26
3.4.3 LDLH Decomposition . . . . . . . . . . . . . . . . . . . . . 27
3.4.4 Iterative Algorithm of EALOI . . . . . . . . . . . . . . . . . 27
3.5 Computing the Eigenvectors with Tri-diagonal Matrix Algorithm
(CETDMA) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30
3.5.1 Computing the Eigenvectors . . . . . . . . . . . . . . . . . . 30
3.5.2 Tri-diagonal Matrix Algorithm (TDMA) . . . . . . . . . . . 30
3.5.3 Numerically Stable Nonzero Solution . . . . . . . . . . . . . 31
3.6 Left- and Right- Singular Matrix . . . . . . . . . . . . . . . . . . . 33
3.7 Mean Square Error Analysis . . . . . . . . . . . . . . . . . . . . . . 34
3.8 Computational Complexity Analysis . . . . . . . . . . . . . . . . . 35
4 Hardware Design and Implementation Results 37
4.1 Proposed Architecture . . . . . . . . . . . . . . . . . . . . . . . . . 37
4.2 Pre-processing Architecture . . . . . . . . . . . . . . . . . . . . . . 38
4.2.1 Normal Vector Generation . . . . . . . . . . . . . . . . . . . 40
4.3 Eigenvalue Approximation by Law of Inertia (EALOI) . . . . . . . 41
4.3.1 Jacobi Rotation . . . . . . . . . . . . . . . . . . . . . . . . . 41
4.3.2 LDLH Decomposition . . . . . . . . . . . . . . . . . . . . . 43
4.3.3 Ordering . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 44
4.4 Tri-diagonal Matrix Algorithm (TDMA). . . . . . . . . . . . . . . . 45
4.5 Word-Length Determination . . . . . . . . . . . . . . . . . . . . . . 46
4.6 Chip Implementation . . . . . . . . . . . . . . . . . . . . . . . . . . 48
4.6.1 RTL and Chip Layout Simulation Results . . . . . . . . . . 48
4.6.2 Design for Testability (DFT) . . . . . . . . . . . . . . . . . . 49
4.6.3 Design for Automatic Placement and Routing . . . . . . . . 49
4.6.4 Chip and Measurement Results . . . . . . . . . . . . . . . . 52
4.6.5 Comparison . . . . . . . . . . . . . . . . . . . . . . . . . . . 52
5 Conclusions and Future Works 57
5.1 Conclusions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 57
5.2 FutureWorks . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 58
Reference . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 59

[1] C. Senning, C. Studer, P. Luethi, and W. Fichtner, "Hardware-Ecient Steer-
ing Matrix Computation Architecture for MIMO Communication Systems"
in IEEE International Symposium on Circuits and Systems (ISCAS), Seattle,
WA, May 2008, pp. 304-307.
[2] C. Studer, P. Blosch, P. Friedli and A. Burg, "Matrix Decomposition Archi-
tecture for MIMO Systems : Design and Implementation Trade-Os" in IEEE
Asilomar Conference on Signals, Systems and Computers (ACSSC), Pacic
Grove, CA, Nov. 2007, pp.1986-1990.
[3] T. Kaji, S. Yoshizawa and Y. Miyanaga, "Development of an ASIP-Based
Singular Value Decomposition Processor in SVD-MIMO Systems" in IEEE
International Symposium on Intelligent Signal Processing and Communica-
tions Systems (ISPACS), Chiang Mai, TH, Dec. 2011, pp. 1-5.
[4] Cheng-Zhou Zhan, Yen-Liang Chen, and An-Yeu Wu, "Iterative Superlin-
ear Convergence SVD Beamforming Algorithm and VLSI Architecture for
MIMO-OFDM Systems, " IEEE Transactions on Signal Processing, vol. 60,
no. 6, pp. 3264-3277, Jun. 2012
[5] H. Iwaizumi, S. Yoshizawa and Y. Miyanaga, "A New High-Speed and Low-
Power LSI Design of SVD-MIMO-OFDM Systems" in IEEE International
Symposium on Communications and Information Technologies (ISCIT), Gold
Coast, QLD, AU, Oct. 2012, pp. 204-209.
[6] G. H. Golub and C. Reinsch, "Singular Value Decomposition and Least
Squares Solutions, "Journal on Numerical Mathematics, vol. 14, no. 5, pp.
403-420, Apr. 1970.
[7] R. Mcllhenny and M. D. Ercegovac, "On the Design of An On-Line Complex
Householder Transform" in IEEE Asilomar Conference on Signals, Systems
and Computers (ACSSC), Pacic Grove, CA, Oct. 2006, pp. 318-322.
[8] M. Gu and S. C. Eisenstat, "A Divide-and-Conquer Algorithm for the Sym-
metric Tridiagonal Eigenproblem, "SIAM Journal on Matrix Analysis and
Applications, vol. 16, no. 1, pp. 172-191, Jan. 1995.
[9] D. P. O'Leary and G. W. Stewart, "Computing the Eigenvalues and Eigenvec-
tors of Symmetric Arrowhead Matrices, "Journal on Computational Physics,
vol. 90, pp. 497-505, Oct. 1990.
[10] J. R. Bunch, C. P. Nielsen, and D. C. Sorensen, "Rank-One Modication of
the Symmetric Eigenproblem, "Journal on Numerische Mathematik, vol. 31,
no. 1, pp. 31-48, Mar. 1978.
[11] M. Gu, Studies in Numerical Linear Algebra, Ph.D. thesis, Department of
Computer Science, Yale University, New Haven, CT, 1993.
[12] M. Gu and S. C. Eisenstat, "A Stable and Ecient Algorithm for the Rank-
One Modication of the Symmetric Eigenproblem, "SIAM Journal on Matrix
Analysis and Applications, vol. 15, no. 1, pp. 1266-1276, Mar. 1994.
[13] T. J. Willink, "Ecient Adaptive SVD Algorithm for MIMO Applica-
tions, "IEEE Transactions on Signal Processing, vol. 56, no. 2, pp. 615-622,
Feb. 2008.
[14] H. Choi and W. P. Burleson, "Search-Based Wordlength Optimization for
VLSI/DSP Synthesis" in IEEE Workshop on VLSI Signal Processing (VL-
SISP), Vol. 4, La Jolla, CA, Oct. 1994, pp. 198-207.
[15] Wireless LAN Medium Access Control (MAC) and Physical Layer (PHY)
Specications, IEEE Std 802. 11n, 2009.
[16] Specication Framework for TGac, IEEE802.11 document 09/0992r15, 2010.
[17] V. Hari and K. Veselic, "On Jacobi Methods for Singular Value Decomposi-
tions, "SIAM Journal on Scientic and Statistical Computing, vol. 8, no. 5,
pp. 741-754, Sep. 1987.
[18] R. P. Brent, F. T. Luk and C. Van Loan, "Computation of the Singular
Value Decomposition Using Mesh-Connected Processors, "Journal on VLSI
Computer Systems, vol. 1, no. 3, pp. 242-270, Mar. 1983-1985.
[19] Sun Yu-xiang and Xu Yong, "Generalized Inverse Eigenvalue Problem of
Arrow-Like Matrices, "Journal of Hefei University of Technology, vol. 32,
no. 8, Aug. 2009.
[20] L. M. Ledesma-Carrillo, E. Cabal-Yepez, R. de J. Romero-Troncoso,
A. Garcia-Perez, R. A .Osornio-Rios and T. D. Carozzi, "Recongurable
FPGA-Based Unit for Singular Value Decomposition of Large m n Ma-
trices" in IEEE International Conference on Recongurable Computing and
FPGAs (ReConFig), Cancun, MX, Nov. 2011, pp. 345-350.
[21] R. Mcllhenny and M. D. Ercegovac, "On the Design of An On-Line Complex
Householder Transform" in IEEE Asilomar Conference on Signals, Systems
and Computers (ACSSC), Pacic Grove, CA, Oct. 2006, pp. 318-322.
[22] A. Kavcic and Bin Yang, "A New Ecient Subspace Tracking Algorithm
Based on Singular Value Decomposition" in IEEE International Conference
on Acoustics, Speech, and Signal Processing (ICASSP), Vol. 4, Adelaide, SA,
Apr. 1994, pp. 485-488.
[23] Yue Wang, K. Cunningham, P. Nagvajara and J. Johnson, "Singular Value
Decomposition Hardware for MIMO : State of the Art and Custom Design"
in IEEE International Conference on Recongurable Computing and FPGAs
(ReConFig), Quintana Roo, MX, Dec. 2010, pp. 400-405.
[24] Yen-Liang Chen, Ting-Jyun Jheng, Cheng-Zhou Zhan and An-Yeu Wu, "A
2.17 mm2 125 mW Recongurable SVD Chip for IEEE 802.11n System" in
IEEE European Solid-State Circuits Conf. (ESSCIRC), Seville, ES, Sep. 2010,
pp. 534-537.
[25] J. Srinivasan and S. Rajaram, "FPGA Implementation of Precoding Using
Low Complexity SVD for MIMO-OFDM Systems" in IEEE International
Conference on Information Communication and Embedded Systems (ICI-
CES), Chennai, IN, Feb. 2013, pp. 1057-1063.
[26] C. Studer, P. Blosch, P. Friedli and A. Burg, "Matrix Decomposition Archi-
tecture for MIMO Systems : Design and Implementation Trade-Os" in IEEE
Asilomar Conference on Signals, Systems and Computers (ACSSC), Pacic
Grove, CA, Nov. 2007, pp.1986-1990.
[27] Young-Tae Kim, Heunchul Lee, Seokhwan Park and Inkyu Lee, "Optimal
Precoding for Orthogonalized Spatial Multiplexing in Closed-Loop MIMO
Systems, "IEEE Journal on Selected Areas in Communications, vol. 26, no. 8,
pp. 1556-1566, Oct. 2008.
[28] D. C. Sorensen and P. T. P. Tang, "On the Orthogonality of Eigenvectors
Computed by Divide-and-Conquer Techniques, "SIAM Journal on Numerical
Analysis, vol. 28, no. 6, pp. 1752-1775, Dec. 1991.
[29] W. E. Shreve and M. R. Stabnow, An Eigenvalue Algorithm for Symmetric
Bordered Diagonal Matrices, New York: Elsevier Science, 1987, pp. 339-346.
[30] D. P. O. Leary and G. W. Stewart, "Computing the Eigenvalues and Eigenvec-
tors of Symmetric Arrowhead Matrices, "Journal on Computational Physics,
vol. 90, no. 2, pp. 497-505, Oct. 1990.
[31] E. R. Jessup and I. C. F. Ipsen, "Improving the Accuracy of Inverse Itera-
tion, "SIAM Journal on Scientic and Statistical Computing, vol. 13, no. 2,
pp. 550-572, 1992.
[32] J. J. Dongarra and D. C. Sorensen, "A Fully Parallel Algorithm for the Sym-
metric Eigenvalue Problem, "SIAM Journal on Scientic and Statistical Com-
puting, vol. 8, no. 2, pp. 139-154, Mar. 1987.
[33] J. R. Bunch, C. P. Nielsen and D. C. Sorensen, "Rank-One Modication of
the Symmetric Eigenproblem, "Journal on Numerische Mathematik, vol. 31,
no. 1, pp. 31-48, 1978.
[34] H. Bowdler, R. S. Martin, C. Reinsch and J. Wilkinson, "The QR and QL
Algorithms for Symmetric Matrices, "Journal on Numerische Mathematik,
vol. 11, no. 4, pp. 293-306, 1968.
[35] J. L. Barlow, "Error Analysis of Update Methods for the Symmetric Eigen-
value Problem, "SIAM Journal on Matrix Analysis and Applications, vol. 14,
no. 2, pp. 598-618, Apr. 1993.
[36] P. Arbenz and G. H. Golub, "QR-Like Algorithms for Symmetric Arrow Ma-
trices, "SIAM Journal on Matrix Analysis and Applications, vol. 13, no. 2,
pp. 655-658, Apr. 1992.
[37] P. Arbenz, "Divide-and-Conquer Algorithms for the Bandsymmetric Eigen-
value Problem, "Journal on Parallel Computing, vol. 18, no. 10, pp. 1105-
1128, Jan. 1992.
[38] D. Markovic, B. Nikolic and R. W. Brodersen, "Power and Area Minimiza-
tion for Multidimensional Signal Processing, "IEEE Journal on Solid-State
Circuits, vol. 42, no. 4, pp. 922-934, Apr. 2007.
[39] K. Dickson, Z. Liu and J. McCanny, "QRD and SVD Processor Design Based
on An Approximate Rotations Algorithm" in IEEE Workshop on Signal Pro-
cessing Systems (SIPS), Austin, Texas, USA, Oct. 2004, pp. 42-47.
[40] R. Mcllhenny and M. D. Ercegovac, "On the Design of An On-Line Complex
Householder Transform" in IEEE Asilomar Conference on Signals, Systems
and Computers (ACSSC), Pacic Grove, CA, Oct. 2006, pp. 318-322.
[41] Richard L. Burden and J. Douglas Faires, Numerical Analysis, 8nd ed. Flo-
rence, KY: Cengage Learning, 2005.
[42] V. Hari and K. Veselic, "On Jacobi Methods for Singular Value Decomposi-
tions, "SIAM Journal on Scientic and Statistical Computing, vol. 8, no. 5,
pp. 741-754, Sep. 1987.
[43] N. D. Hemkumar, J. R. Cavallaro, "A Systolic VLSI Architecture for Com-
plex SVD" in Proc. IEEE International Symposium on Circuits and Systems
(ISCAS), Vol. 3, San Diego, CA, May 1992, pp. 1061-1064.
[44] G. E. Forsythe and P. Henrici, "The Cyclic Jacobi Method for Computing
the Principal Values of a Complex Matrix, "Transactions on the American
Mathematical Society, vol. 94, no. 1, pp. l-23, Jan. 1960.