IGBT驅動在傳統上的做法，會使用如緩衝、減震電路一樣的被動元件，來取得切換時的功率損耗與電壓電流突波之間的平衡。雖然此類型的作法在技術執行上容易達成，但是額外的被動元件、以及其造成的額外功率損耗卻為人詬病。歷來有許多關於IGBT驅動的研究，絕大多數是利用不同開迴路、閉迴路控制架構來調變切換過程中的驅動強弱，藉此來減低di/dt與dv/dt，進而達成抑制暫態電壓電流突波的效果。然而，許多研究僅止於學術層面，對於在實際應用的技術執行上有不小的難度。
本論文研究的目標即為設計一個主動式IGBT閘極驅動電路，採用二階段式閘極控制架構來達成抑制反向回復電流峰值與過電壓的效果，而電源低電壓保護機制則用以提升操作可靠度。關於如何利用二階段式閘極控制來優化IGBT的硬性切換特性，在文中將有詳細分析探討。
該驅動電路利用高壓0.25μm BCD製程來實現。晶片面積為2mm × 2mm。在模擬與實驗量測中，由於IGBT元件切換過程中電流變化速率過高所導致的電壓、電流過衝現象皆有大幅度改善，且與切換能量損耗可達到平衡。

Traditionally, gate control of IGBTs could be a way to reduce switching losses and voltage overshoots by means of adding passive components such as snubbers in the circuits. While they are easy to implement and effective, additional part count and power losses make them less attractive. Previous studies focus on methods of changeable driving speed during switching process, with open-loop or close-loop controls, in order to lower di/dt and dv/dt. However, in some cases, the complexity of the control methodology makes them hard to implement for practical uses.
The objective of this study is to design a gate driver circuit for insulated gate bipolar transistors (IGBTs) with functions such as two-level turn-on to reduce peak reverse recovery current when turning on the device, two-level turn-off to limit over-voltage when the device is turned off, and under-voltage lock out protection. Based on several requirements to achieve optimal switching performance for IGBTs under hard-switching conditions, principles and operations of the two-level gate control are explained. The improvements of current overshoot at turn-on, voltage overshoot at turn-off, and switching energy losses are measured and discussed.
The proposed IC is realized using a foundry’s HV 0.25μm BCD technology. The die area of the IGBT gate driver IC is 2mm × 2mm. Both the simulation and experimental results show good agreement with the theoretical analysis.

摘要 I
Abstract II
Acknowledgements III
Chapter 1. Introduction to IGBT Gate Driver 1
1-1 Overview 1
1-2 IGBT Fundamentals and Switching Analysis 1
1-2.1 Characteristics of IGBTs 1
1-2.2 Anti–Parallel Diode 4
1-2.3 Turn-On Switching Analysis 6
1-2.4 Turn-Off Switching Analysis 8
1-3 Limits of IGBT Operation 9
1-4 Gate Driver Requirements 11
1-4.1 Typical Configurations 11
1-4.2 Gate Voltage 12
1-4.3 Series Gate Resistor 14
1-5 Advanced Methods of Active Gate Control 15
1-5.1 Passive Gate Drive 16
1-5.2 Open-Loop Gate Drive 18
1-5.3 Closed-Loop Gate Drive 20
1-5.4 Pros and Cons 24
Chapter 2. Two-Level Active Gate Control 26
2-1 Overview 26
2-2 Principle of Two-Level Gate Control Technique 26
2-3 Reduction of Over-Current at Turn-On 27
2-4 Reduction of Over-Voltage at Turn-Off 29
2-5 Two-Level Turn-On and Turn-Off Gate Control 31
2-5.1 Turn-On and Turn-Off Current Slope Control 33
2-5.2 Turn-On and Turn-Off Voltage Slope Control 34
2-5.3 Turn-On/Turn-Off Duration Consideration 35
Chapter 3. Impact of Two-Level Gate Control on IGBT Switching Performance 37
3-1 Overview 37
3-2 Test Bed Setup for Simulations 37
3-3 Simulation Results 39
3-3.1 Turn-On Performance Improvement Simulation 39
3-3.2 Turn-Off Performance Improvement Simulation 47
3-3.3 Turn-On Performance Simulation under Different Loadings 54
3-3.4 Turn-Off Performance Simulation under Different Loadings 57
3-4 Chapter Summary 59
Chapter 4. Implementation of Two-Level Active Gate Driver 61
4-1 Overview 61
4-2 Technology Selection for Gate Driver Implementation 61
4-3 Two-Level Active Gate Driver Circuit Design 62
4-3.1 Input Interface 63
4-3.2 Output Driving Stage 66
4-3.3 Error Amplifier 67
4-3.4 Hysteretic Comparator 72
4-3.5 Bandgap Voltage Reference 74
4-3.6 Under Voltage Lock-Out Protection 79
4-3.7 Two-Level Turn-On/Turn-Off Duration Control Circuit 81
4-3.8 Two-Level Turn-On/Turn-Off Gate Control Circuit 87
4-3.9 Logic Control Circuit 96
4-4 Two-Level Active Gate Driver Layout 98
Chapter 5. Experimental Verification 100
5-1 Overview 100
5-2 Laboratory Setup 100
5-2.1 Proposed Two-Level Gate Driver Setup 100
5-2.2 Double-Pulse Test Setup 103
5-2.3 Measurement Equipment 106
5-3 Measurement Results 107
5-3.1 Measurements for Gate Driver Building Blocks 107
5-3.1.1 Input Interface 107
5-3.1.2 Bandgap Voltage Reference 109
5-3.1.3 Under Voltage Lock-Out Protection 110
5-3.1.4 Hysteretic Comparator 112
5-3.1.5 Output Driving Capability 113
5-3.1.6 Two-Level Turn-On/Turn-Off Gate Drive 115
5-3.2 Clamped Inductive Load Hard Switching 127
5-3.2.1 Turn-On Transients 128
5-3.2.2 Turn-Off Transients 137
5-3.2.3 Different Loading Conditions 145
5-4 Chapter Summary 151
Chapter 6. Conclusion and Future Works 152
6-1 Conclusion 152
6-2 Future Works 153
References 155
Appendix A: Gate Driver Circuit Board Layout 164

[1] A. R. Hefner, “An investigation of the drive circuit requirement for the power insulated gate bipolar transistor,” IEEE Transactions on Power Electronics, vol. 4, no. 2, pp. 208–218, 1991.
[2] A. Sattar, “Insulated gate bipolar transistor (IGBT) basics,” IXYS Corporation Application Note, IXAN0063.
[3] W. F. Richardeau, P. Baudesson, and T. A. Meynard, “Failures -tolerance and remedial strategies of a PWM multicell inverter,” IEEE Transactions on Power Electronics, vol. 17, no. 6, pp. 905–912, 2002.
[4] V. K. Khanna, “Insulated gate bipolar transistor (IGBT): theory and design,” IEEE Press, Wiley-Interscience, 2003.
[5] B. J. Baliga, “Fundamentals of power semiconductor devices,” Springer, 2008.
[6] ON Semiconductor, 2000. Insulated Gate Bipolar Transistor with Anti-Parallel Diode, MGW20N60D, Datasheet. [Online] http://onsemi.com.
[7] ON Semiconductor, 2000. Power Field Effect Transistor TO-247 with Isolated Mounting Hole, MTW20N50E, Datasheet. [Online] http://onsemi.com.
[8] D. O. Neascu, “Active gate drivers for motor control applications,” IEEE Power Electronics Specialists Conference Tutorial, 2001.
[9] J. Takesuye and S. Deuty, “Introduction to insulated gate bipolar transistors”, Motorola Semiconductor Application Note, AN1541.
[10] P. Haaf, J. P. Harper, “Diode reverse recovery and its effect on switching losses”, Fairchild Semiconductor, 2006. [Online] http://www.fairchildsemi.com.
[11] J. Millman, “Microelectronics: digital and analog circuits and systems”, McGraw -Hill International Book Company, 1979.
[12] A. Galluzzo, R. Letor, and M. Melito, “Switching with IGBTs: how to obtain better performances,” IEEE Power Conversion on Intelligence Motion, pp. 465–474, 1991.
[13] R. Chokhawala, J. Catt, and B. Pelly, “Gate drive considerations for IGBT Modules,” IEEE Industry Applications Society Annual Meeting, vol. 1, pp. 1186–1195, 1992
[14] F. Blaabjerg and J. K. Pedersen, “Optimized design of a complete three phase PWM-VS inverter,” IEEE Transactions on Power Electronics, vol. 12, no. 3, pp. 567–577, 1997.
[15] H. R. Muhammad, “Power electronics-circuits, devices, and applications,” 3rd edition, Upper Saddle River, NJ, Pearson Prentice Hall, 2004.
[16] R. Sachdeva and E. PNowicki, “A novel high performance resonant gate drive circuit with low circulating current,” 21st IEEE Applied Power Electronics Conference and Exposition, 2006.
[17] N. Mohan, T. M. Undelan, and W. P. Robbins, “Power electronics: converters, applications and design,” 3rd edition, John Wiley & Sons Inc., 2002.
[18] I. Zverev, S. Konrad, H. Voelker, J. Petzoldt, and F. Klotz, “Influence of the gate drive technique on the conducted EMI behaviors of a power converter,” IEEE Power Electronics Specialists Conference, vol. 2, pp. 1522–1528, 1997.
[19] International Rectifier. Insulated Gate Bipolar Transistor With Ultrafast Soft Recovery Diode, IRGP30B120KD-EP, Datasheet. [Online] http://www.irf.com.
[20] International Rectifier. Insulated Gate Bipolar Transistor With Ultrafast Soft Recovery Diode, IRGPS60B120KDP, Datasheet. [Online] http://www.irf.com.
[21] N. McNeil, B. W. Williams, and S. J. Finley, “Assessment of off-state negative gate voltage requirements for IGBTs”, IEEE Power Electronics Specialists Conference, vol. 1, pp. 627–630, 1996.
[22] B. Majumdar, P. Mukhejee, F. A. Talukdar, and S. K. Biswas, “IGBT gate drive circuit with in-built protection and immunity to transient fault,” IEEE International Conference on Industrial Technology, vol. 2, pp. 615–620, 2000.
[23] J. Boehmer, J. Schumann, and H. Eckel, “Effect of the miller-capacitance during switching transients of IGBT and MOSFET,” International Power Electronics and Motion Control Conference, 2012.
[24] M. Abu-Khaizaran, P. Palmer, and Y. Wang, “Parameters influencing the performance of an IGBT gate drive,” IEEE Power Electronics Specialists Conference, pp.3457–3462, 2008.
[25] B. Weis, M. Bruckmann, “A new gate driver circuit for improved turn-off characteristics of high current IGBT modules,” 33rd IEEE Industry Applications Conference, vol. 2, no. 4, pp. 1073–1077, 1998.
[26] R. Sachdeva and E. P. Nowicki, “A novel gate driver circuit for snubberless, low-noise operation of high power IGBT,” IEEE Canadian Conference on Electrical and Computer Engineering, vol. 1, pp.212–217, 2002.
[27] Z. Zhang, F. Wang, L. M. Tolbert, and B. J. Blalock, “A novel gate assist circuit for cross talk mitigation of SiC power devices in a phase-leg configuration”, 28th Applied Power Electronics Conference and Exposition, pp. 1259–1265, 2013.
[28] J. D. Kagerbauer and T. M. Jahns, “Development of an active dv/dt control algorithm for reducing inverter conducted EMI with minimal impact on switching losses,” IEEE Power Electronics Specialists Conference, pp. 894–900, 2007.
[29] Y. Lobsiger and J. W. Kolar, “Closed-loop IGBT gate drive featuring highly dynamic di/dt and dv/dt control,” IEEE Energy Conversion Congress and Exposition, pp. 4754–4761, 2012.
[30] A. Volke, M. Hornkamp, J. Wendt, “IGBT modules: technologies, driver and applications”, 1st edition, Infineon Technologies AG, 2011. [Online] http://www. Infineon.com.
[31] P. J. Grbovic, “Gate driver with feed forward control of turn off performances of an IGBT in short circuit conditions,” European Conference on Power Electronics and Applications, pp. 1–10, 2007.
[32] P. J. Grbovic, “An IGBT gate driver for feed-forward control of turn-on losses and reverse recovery current,” IEEE Transactions on Power Electronics, vol. 23, no. 2, pp. 643–652, 2008.
[33] P. Grbovic, F. Gruson, N. Idir, and P. Le Moigne, “Turn-on performance of reverse blocking IGBT(RB IGBT) and optimization using advanced gate driver,” IEEE Transactions on Power Electronics, vol. 25, no. 4, pp. 970–980, 2010.
[34] Z. Wang, X. Shi, L. M. Tolbert, and B. J. Blalock, “Switching performance improvement of IGBT modules using an active gate driver,” 28th IEEE Applied Power Electronics Conference and Exposition, pp. 1266–1273, 2013.
[35] H. G. Eckel and L. Sack, “Optimization of the turn-off performance of IGBT at overcurrent and short-circuit current,” 5th European Conference on Power Electronics and Applications, vol. 2, pp. 317–322, 1993.
[36] J. H. Kim, D. H. Park, J. B. Kim, and B. H. Kwon, “An active gate drive circuit for high power inverter system to reduce turn-off spike voltage of IGBT,” 7th International Conference on Power Electronics, pp. 127–131, 2007.
[37] C. Licitra, S. Musumeci, A. Raciti, A. Galluzzo, R. Letor, and M. Melito, “A new driving circuit for IGBT devices,” IEEE Transaction on Power Electronics., vol. 10, no. 3, pp. 373–378, 1995.
[38] S. Takizawa, S. Igarashi, and K. Kuroki, “A new di/dt control gate drive circuit for IGBTs to reduce EMI noise and switching losses,” 29th IEEE Power Electronics Specialists Conference, vol. 2, pp. 1443–1499, 1998.
[39] R. Hemmer, “Intelligent IGBT drivers with exceptional driving and protection features,” 13th European Conference on Power Electronics and Applications, pp. 1–4, 2009.
[40] A. Galluzzo, M. Melito, G. Belverde, S. Musumeci, A. Raciti, and A. Testa, “Switching characteristic improvement of modern gate controlled devices,” 5th European Conference on Power Electronics and Applications, vol. 2, pp. 374–379, 1993.
[41] S. Musumeci, A. Raciti, A. Testa, A. Galluzzo, and M. Melito, “Switching behavior improvement of insulated gate-controlled devices,” IEEE Transactions on Power Electronics, vol. 12, no. 4, pp. 645–653, 1997.
[42] V. John, B. S. Suh, and T. A. Lipo, “High-performance active gate drive for high-power IGBTs,” IEEE Transactions on Industry Applications, vol. 35, no. 5, pp. 1108–1117, 1999.
[43] A. Consoli, S. Musumeci, G. Oriti, and A. Testa, “An innovative EMI reduction design technique in power converters,” IEEE Transactions on Electromagnetic Compatibility, vol. 38, no. 4, pp. 567–575, 1996.
[44] S. Musumeci, A. Raciti, A. Testa, A. Galluzzo, and M. Melito, “A new adaptive driving technique for high current gate controlled devices,” 9th Applied Power Electronics Conference and Exposition, vol. 1, pp. 480–486, 1994.
[45] V. John, B.-S. Suh, and T. A. Lipo, “High performance active gate drive for high power IGBTs,” 33rd IEEE Industry Applications Conference Annual Meeting, vol. 2, pp. 1519–1529, 1998.
[46] G. Schmitt, R. Kennel, and J. Holtz, “Voltage gradient limitation of IGBTs by optimised gate-current profiles,” 39th IEEE Power Electronics Specialists Conference, pp. 3592–3596, 2008.
[47] B. Wittig and F. W. Fuchs, “Analysis and comparison of turn-off active gate control methods for low-voltage power MOSFETs with high current ratings,” IEEE Transactions on Power Electronics, vol. 27, no. 3, pp. 1632–1640, 2012.
[48] L. Dulau, S. Pontarollo, A. Boimond, J. F. Garnier, N. Giraudo, O.Terrasse, “A new gate driver integrated circuit for IGBT devices with advanced protections”, IEEE Transactions on Power Electronics, Vol. 21, no.1, pp. 38–44, 2006.
[49] N. Idir, R. Bausiere, and J. J. Franchaud, “Active gate voltage control of turn-on di/dt and turn-off dv/dt in insulated gate transistors,” IEEE Transactions on Power Electronics, vol. 21, no. 4, pp. 849–855, 2006.
[50] P. R. Palmer and H. S. Rajamani, “Active voltage control of IGBTs for high power applications,” IEEE Transactions on Power Electronics, vol. 19, no. 4, pp. 894–901, 2004.
[51] Y. Wang, A. T. Bryant, P. R. Palmer, S. J. Finney, M. Abu-Khaizaran, and G. Li, “An analysis of high power IGBT switching under cascade active voltage control,” 40th IEEE Industry Applications Society Annual Meeting, vol. 2, pp. 806–812, 2005.
[52] Y. Wang, P. R. Palmer, A. T. Bryant, S. J. Finney, M. S. Abu-Khaizaran, and G. Li, “An analysis of high-power IGBT switching under cascade active voltage control,” IEEE Transactions on Industry Applications, vol. 45, no. 2, pp. 861– 870, 2009.
[53] Y. Wang, P. R. Palmer, T. C. Lim, S. J. Finney, and A. T. Bryant, “Real-time optimization of IGBT/diode cell switching under active voltage control,” 41st IEEE Industry Applications Society Annual Meeting, vol. 5, pp. 2262–2268, 2006.
[54] L. Michel, X. Boucher, A. Cheriti, Pierre. Sicard, and F. Sirois, “FPGA implementation of an optimal IGBT gate driver based on Posicast control,” IEEE Transactions on Power Electronics, vol. 28, no. 5, pp. 2569–2575, 2013.
[55] L. Dang, H. Kuhn, and A. Mertens, “Digital adaptive driving strategies for high-voltage IGBTs,” IEEE Energy Conversion Congress and Exposition, pp. 2993–2999, 2011.
[56] H. Kuhn, T. Koneke, and A. Mertens, “Considerations for a digital gate unit in high power applications,” 39th IEEE Power Electronics Specialists Conference, pp. 2784–2790, 2008.
[57] H. Kuhn, T. Koneke, A. Mertens, “Potential of digital gate units in high power applications,” 13th Power Electronics and Motion Control Conference, pp. 1458–1464, 2008.
[58] M. Helsper and F. Fuchs, “Adaptation of IGBT switching behaviour by means of active gate drive control for low and medium power,” 10th European Conference on Power Electronics and Applications, 2003.
[59] L. Chen and F. Z. Peng, “Closed-loop gate drive for high power IGBTs,” Applied Power Electronics Conference and Exposition, pp. 1331–1337, 2009.
[60] L. Chen, B. Ge, and F. Z. Peng, “Modeling and analysis of closed-loop gate drive,” Applied Power Electronics Conference and Exposition, pp. 1124–1130, 2010.
[61] K. Fink and S. Bernet, “Advanced gate drive unit with closed-loop di/dt control,” IEEE Transactions on Power Electronics, vol. 28, no. 5, pp. 2587–2595, 2013.
[62] J. P. Berry, “MOSFET operating under hard switching mode: voltage and current gradients control,” Symposium on Materials and Devices for Power Electronics, pp. 130–134, 1991.
[63] C. Gerster, P. Hofer, and N. Karrer, “Gate-control strategies for snubberless operation of series connected IGBTs,” 27th IEEE Power Electronics Specialists Conference, vol. 2, pp. 1739–1742, 1996.
[64] A. N. Githiari, R. J. Leedham, and P. R. Palmer, “High performance gate drives for utilizing the IGBT in the active region,” IEEE Power Electronics Specialists Conference, vol. 2, pp. 1754–1759, 1996.
[65] S. Park and T. M. Jahns, “Flexible dv/dt and di/dt control method for insulated gate power switches,” 36th IEEE Industry Applications Society Annual Meeting, vol. 2, pp. 1038–1045, 2001.
[66] S. Park and T. M. Jahns, “Flexible dv/dt and di/dt control method for insulated gate power switches,” IEEE Transactions on Industry Applications, vol. 39, no. 3, pp. 657–664, 2003.
[67] C. Dorlemann and J. Melbert, “New IGBT driver with independent dv/dt- and di/dt-feedback-control for optimized switching behavior,” 2nd International Conference on Integrated Power Systems, pp. 107–114, 2002.
[68] J. F. Garnier and A. Boimond, “New IGBT driver IC including advanced control and protection functions for 1200 V, 3-phase inverter applications,” IEEE Power Conversion on Intelligence Motion, pp. 615–619, 2004.
[69] C. Y. Wu and C. T. Chiang, “A low-photocurrent CMOS retinal focal-plane sensor with a pseudo-BJT smoothing network and an adaptive current Schmitt trigger for scanner applications,” IEEE Sensors Journal, vol. 4, no. 4, pp. 510–518, 2004.
[70] K. Dejhan, P. Tooprakai, T. Rerkmaneewan, and C. Soonyeekan, “A high-speed direct bootstrapped CMOS Schmitt trigger circuit,” IEEE International Conference on Semiconductor Electronics, 2004.
[71] I. M. Filanovsky and H. M. Filanovsky and H. Bakes, “CMOS Schmitt trigger design,” IEEE Transactions on Circuits and Systems, vol. 41, no. 1, pp. 46–49, 1994.
[72] K. Gulati and H. S. Lee, “A high-swing CMOS telescopic operational amplifier,” IEEE Journal of Solid-State Circuits, vol. 33, no. 12, pp. 2010–2019, 1998.
[73] M. Asloni, K. Hadidi, and A. Khoei, “Design of a new folded cascode op-amp using positive feedback and bulk amplification,” IEICE Transactions on Electronics, vol. 90, no. 6, pp.1253–1257, 2007.
[74] P. E. Allen and D. R. Holberg, “CMOS analog circuit design,” 2nd edition, Oxford University Press Inc., 2002.
[75] X. Lai, J. Hu, and H. Wang, “Design of hysteretic comparator with bandgap structure,” 5th International Conference on ASIC, vol. 1, pp.615–618, 2003.
[76] F. Li, W. Wang, Q. Hang, W. Xie, and Z. Lu, “Design of a under voltage lock out circuit with bandgap structure,” 12th International Symposium on Integrated Circuits, pp.224–227,2009.
[77] L. Dulau and S. Pontarollo, “Control device of power switches controlled by voltage,” French Patent FR 0 306 344, 2003.
[78] A. A. Fomani, W. T. Ng, and A. Shorten, “An integrated segmented gate driver with adjustable driving capability,” IEEE Energy Conversion Congress and Exposition, pp.2430–2433, 2010.
[79] “Layout Considerations for Non-Isolated DC-DC Converters”, Application Note. 735, Maxim 2001. [Online] http://www.maxim-ic.com.
[80] M. Pavier, A. Woodworth, A. Sawle, R. Monteiro, C. Blake and J. Chiu, “Understanding the effect of power MOSFET package parasitics on VRM circuit efficiency at frequencies above 1MHz” Application Notes International Rectifier, 2003.