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作者(中文):莊捷旭
作者(外文):Chuang, Chieh-Hsu
論文名稱(中文):低相位雜訊全差動式微機械振盪器設計
論文名稱(外文):Design of a Low Phase Noise Reference Oscillator Based on Fully Differential Micromechanical Resonators
指導教授(中文):李昇憲
指導教授(外文):Li, Sheng-Shian
口試委員(中文):呂良鴻
盧向成
鄭裕庭
口試委員(外文):Lu, Michael S.-C.
Lu, Liang-Hung
Cheng, Yu-Ting
學位類別:碩士
校院名稱:國立清華大學
系所名稱:動力機械工程學系
學號:100033552
出版年(民國):102
畢業學年度:101
語文別:中文
論文頁數:77
中文關鍵詞:微機電系統相位雜訊微機械共振器微機械振盪器Lamè模態
外文關鍵詞:Micro-Electro-Mechanical Systems (MEMS)Phase noiseMicromechanical ResonatorMEMS OscillatorLamè mode
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本文實現具有自我偏壓機制的電容式微機械振盪器,其組成之共振器具備50奈米傳導間隙,且為一真空封裝之單晶矽Lamè-mode微機械振盪器。我們能有效利用設計電路的輸入與輸出端之直流偏壓電位,使共振器元件的致動與感測電極分別具有電性,這種方式足夠使Lamè-mode微機械振盪器產生自我振盪。
除此之外,為了探討降低微機械振盪器相位雜訊的方法,本論文利用商用IC與微機械共振器的整合,實現兩種不同的Lamè-mode微機械振盪器架構:分別為全差動式(Differential-In-Differential-Out, DIDO)與單端輸入雙端輸出(Single-In-Differential-Out, SIDO)。我們能透過全差動式的架構,有效減少第二諧波對於振盪器相位雜訊的影響,由本文實驗結果得知DIDO相較於SIDO架構,在close-to-carrier至少改善多達25dB的相位雜訊。因此全差動式的架構,能使電容式微機械振盪器具有良好的相位雜訊表現。
此微機械振盪器工作頻率為17.6MHz,於1KHz頻率偏移的相位雜訊表現為-127dBc/Hz,且於far-from-carrier的相位雜訊達到-132dBc/Hz。此振盪器的相位雜訊表現,在現今電容式微機械振盪器中極具競爭力,且與至今發表的MEMS振盪器比較,本研究具有最低之極化電壓。
In this work, we realize the low-polarization-voltage (Vp) capacitive MEMS oscillators implementing vacuum packaged 50nm-gap Lamè-mode silicon micromechanical resonators and investigate their phase noise performance. Single-crystal-silicon square-plate microresonators were fabricated by a foundry-oriented SOI-MEMS plus a poly-Si refill process. The devices were hermetically encapsulated at wafer-level using a eutectic bonding technique, which reduces air damping and enables high Q. The frequency of the resonators are around 17.6MHz and the extracted Q is about 20,000 while the motional impedance is around 6.7kΩ (Vp = 3V).
We also report the design and characterization of high gain-bandwidth TIA (transimpedance voltage amplifier) which is composed of two stages: the inverter-based I-to-V stage and voltage gain amplifier. The tunable-gain TIA circuit is fabricated using 2P4M 0.35µm CMOS technology and has been demonstrated with the maximum gain of 80dBΩ, 3-dB bandwidth of 134MHZ. The fully-differential oscillators based on 0.35µm TIA achieve a phase noise of –92dBc/Hz at 1kHz offset and -117dBc/Hz far-from-carrier phase noise performance.
In order to reduce the phase noise, we study the different oscillator configurations which are composed of commercial IC; these are here referred to as differential-in-differential-out (DIDO) and single-in-differential-out (SIDO). Clear disparities in their respective phase noise profiles could be observed. The DIDO outperforms the SIDO with an improved close-to-carrier phase noise by more than -127dBc/Hz at 1kHz offset and -132dBc/Hz far-from-carrier phase noise performance, which is competitive with state-of-the-art capacitive MEMS oscillators but with lowest Vp in this work.
目錄
ABSTRACT ix
摘要 xi
致謝 xii
第一章 前言 1
1.1 射頻微機電簡介 1
1.2 研究動機與內容架構 2
1.3 MEMS振盪器研究動機 6
1.4 內容架構 9
第二章 原理與模擬 12
2.1 MEMS共振器結構設計 12
2.2 共振器運作原理分析與模擬 12
第三章 支撐電路與微機械振盪器設計 25
3.1 串聯諧振振盪器介紹 26
3.2 轉阻放大器回顧 29
3.3 振盪器電路設計 33
第四章 SOI-MEMS製程與結果 47
第五章 量測結果 52
5.1 Lamè模態共振器量測 52
5.2 支撐電路量測 57
5.3 MEMS振盪器量測 62
第六章 結論與未來研究 70
文獻參考 73

圖目錄
Figure 1-1:美國密西根大學的Prof. Nguyen團隊利用多晶矽製作梳狀結構共振器SEM圖。[7] 4
Figure 1-2:美國密西根大學的Prof. Nguyen團隊利用多晶矽製作酒杯式共振器SEM圖。[8] 4
Figure 1-3:喬治亞理工大學Prof. Farrokh Ayazi利用SOI製作具有高Q值與高頻率之MEMS振盪器。[9] 5
Figure 1-4:法國Minatec研究中心以SOI製程完成具有90奈米間隙之MEMS共振器。[10] 5
Figure 1-5:芬蘭VTT研團隊以square-extensional 模態微機械振盪器達成GSM標準。[11] 5
Figure 2-1:(a) Lamè模態共振器之結構圖,其中共振器主結構位於中央 ; 周圍的電極提供致動(Driving)與感測(Sensing)的功用。(b)機械振動學的等效MCK模型。(c)共振器的等效RLC電路模型。 19
Figure 2-2:共振器的等效RLC電路模型。 20
Figure 2-3:方型板邊界條件與座標說明作示意圖。 20
Figure 2-4:ADS (Advanced Design System)模擬共振器等效RLC電路。(a) S21的Amplitude,單位為dB。(b) S21的Phase。 21
Figure 2-5:Comsol Multiphysics模擬Lamè模態共振器因蝕刻孔洞對頻率漂移的影響。(a) 蝕刻孔洞大小為2µm,共振器振盪頻率為18.4 MHz。(b) 蝕刻孔洞大小為3µm,共振器振盪頻率為17.7 MHz。 22
Figure 3-1:MEMS串聯諧振振盪器說明圖。 27
Figure 3-2:MEMS串聯諧振振盪器說明圖:(a) 180°與(b) 0°相位偏移情形。 28
Figure 3-3:喬治亞理工大學Prof. Farrokh Ayazi團隊提出具有頻寬150MHz以上,增益為80dBΩ的二級電路架構。[9] 32
Figure 3-4:加拿大Unuversite du Québee áMontréal團隊提出具有112 dBΩ增益與74 MHz頻寬的轉阻放大器架構。[24] 32
Figure 3-5:美國史丹佛團隊提出可調且極高增益的轉阻放大器架構。[25] 33
Figure 3-6:本論文設計之支撐電路架構。 40
Figure 3-7:第一級電路架構: Inverter-based TIA。 40
Figure 3-8:第一級轉阻放大器的小訊號等效模型。 41
Figure 3-9:第一級轉阻放大器的小訊號等效模型。 41
Figure 3-10:第二級寬頻電壓放大器的等效半電路示意圖。 42
Figure 3-11:第二級寬頻電壓放大器的小訊號等效模型。 42
Figure 3-12:本論文設計電路CMOS T18製程之低阻抗輸出級。 43
Figure 3-13:本論文設計電路CMOS D35製程之低阻抗輸出級。 43
Figure 3-14:(a) Hspice模擬T18整體電路增益結果。(b) Hspice模擬T18整體電路增益與相位關係。 44
Figure 3-15:(a) Hspice模擬D35整體電路增益結果。(b) Hspice模擬D35整體電路增益與相位關係。 45
Figure 4-1:側視圖說明SOI-MEMS共振器的製程。(a) SOI Wafer側視圖。(b)定義共振器幾何結構。(c)犧牲氧化矽層生成。(d)定義共振器周圍電極。(e)利用光阻定義金屬與蝕刻孔洞位置。(f)乾式蝕刻以移除二氧化矽而釋放共振器結構。 49
Figure 4-2:方形板共振器的SEM全景圖,包括電容致動器與電極板。 50
Figure 4-3:方形板共振器表面蝕刻孔洞局部放大SEM圖。 50
Figure 4-4:具微小50奈米傳導間隙的方形板共振器與多晶矽側電極。 51
Figure 5-1:Lamè模態共振器的雙埠(Two-Port)量測實驗儀器架設。 55
Figure 5-2:Lamè模態共振器在不同極化電壓下的量測結果。 55
Figure 5-3:Lamè模態共振器功率負載能力量測結果,訊號強度為-20dBm至0dBm。 56
Figure 5-4:具有微小間隙的Lamè模態共振器量測結果,其中虛線為當輸入較大交流訊號時共振器共振響應結果。 56
Figure 5-5:應用於振盪器之後端支撐電路OM圖: (a) CMOS 0.18µm製程。(b) CMOS 0.35µm製程。 58
Figure 5-6支撐電路增益變化圖: (a) CMOS 0.18µm製程。(b) CMOS 0.35µm製程。 59
Figure 5-7:微機械振盪器架構: (a) 單端輸入雙端輸出微機械振盪器(SIDO)。(b) 全差動式微機械振盪器(SIDO)。 61
Figure 5-8:應用於SIDO振盪器架構的商用電路AD8015與Ths4131的增益與相位量測結果。 61
Figure 5-9:印刷電路板裝載設計電路與共振器(利用wire bonding整合)的陶瓷板。 66
Figure 5-10: Lamè模態微機械振盪器相位雜訊表現(電路為CMOS 0.35μm製程)。 66
Figure 5-11: Lamè模態微機械振盪器時域輸出訊號(電路為CMOS 0.35μm製程)。 67
Figure 5-12: De-embedded振盪器開迴路量測:(a) SIDO;(b) DIDO架構(各圖中的小圖分別為沒經過De-embedding的振盪器開迴路量測)。 67
Figure 5-13:振盪器的基頻(~17.63 MHz)頻譜量測圖:(a) SIDO (VP=2.2V, Span=10 kHz);(b) DIDO (VP=3.2V, Span=1 kHz)(各圖中的小圖分別為輸出訊號的時域波形)。 68
Figure 5-14:振盪器的相位雜訊量測圖:(a) SIDO;(b) DIDO。 69

表目錄
Table 1-1:電容式與壓電式制動的比較。 11
Table 2-1:機械參數與電路參數轉換關係。 20
Table 2-2:方型板共振器尺寸規格表。 24
Table 3-1:設計之電路與文獻的比較。 33
Table 3-2:支撐電路post-sim模擬與量測結果。 46
Table 5-1:本論文設計之轉阻放大器模擬與量測統整表。 60
Table 6-1:本論文設計之Lamè模態振盪器與現今商品化產品比較表。 72


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