本論文使用COMSOL來設計和分析表面電漿波導管，並藉由計算訊號傳遞距離和模態面積來了解效能表現，再計算功率比例來驗證改良結果。
本論文提出改良的結構，以金屬置頂混合式表面電漿子波導管(metal on top surface plasmon polariton waveguide, MOP SPP WG )為基礎，藉由金屬與低介電係數層的接觸面積縮減來降低能量損耗，以達到提升訊號傳遞距離的目標，並研究其變化趨勢，找出效能最佳化的結構設計。文中主要模擬了三種不同金屬結構的表面電漿子波導管來加以分析，首先是找出主要的金屬損耗區域並加以改良，再來是進一步減少金屬尖端結構的產生，最後是降低金屬與介電質(空氣)的接觸面積。由以上這三種模擬結果可以分析出最佳化的結構設計，
而最佳化的結構設計為減少金屬與低介電係數層的接觸面積和尖端部分，其金屬結構的形狀類似一個倒立三角形，根據模擬結果可以顯示，其傳遞距離可以大幅提升，而模態面積維持不變，因為在金屬中的功率比例下降，使得損耗降低，因此提升了表面電漿子波導管的效能。這樣的結構設計在不增加體積的條件下，提升了訊號傳遞距離，對於未來光積體電路的整合有很大的幫助。

摘要 i
Abstract ii
誌謝 iii
第一章 引言 1
1.1 研究背景 1
1.2 研究動機 3
1.3 論文架構 4
第二章 文獻回顧 5
2.1 混合式表面電漿波導管-金屬置底結構 5
2.2 金屬置底型改良低折射係數層 6
2.3 金屬置頂 8
2.4 金屬置頂 增加斜度變化 11
2.5 金屬置頂-空氣結構 13
2.6 金屬置頂-T型介電質層結構 15
第三章 基礎理論 18
3.1 德汝德模型(Drude Model)[1] [16] 18
3.2 電磁波的色散關係式(dispersion relation)[1] [16] 20
3.3 金屬-介電質間的表面電漿子模式[1] [16] 21
第四章 模擬方法 26
4.1 模擬軟體介紹 26
4.2 使用COMSOL計算等效折射係數、傳播長度、模態面積 28
4.2.1 等效折射係數 29
4.2.2 傳播長度(propagation length) 31
4.2.3 模態面積(mode area) 32
4.3 結論 33
4.4 Power ratio計算 33
第五章 結果與討論 35
5.1 金屬置頂之混合式表面電漿子波導管 35
5.2 MOP SPP WG結構變化 47
5.3 MOP SPP WG結構改良1 56
5.4 MOP SPP WG結構改良3 64
5.5 MOP SPP WG結構改良4 68
第六章 結論 73
附錄 75
附錄A : 隨b變化之電磁場分布圖 75
附錄B : 隨a變化之電磁場分布圖 81
附錄C : 隨R2變化之電磁場分布圖 87
附錄D : 隨R3變化之電磁場分布圖 90
附錄E : 低介電係數材料表[17] 95
參考文獻 96

[1] 吳民耀、劉威志, "表面電漿子理論與模擬," 物理雙月刊（廿八卷二期）, 2006.
[2] H. A. Atwater, "The Promise of PLASMONICS," SCIENTIFIC AMERICAN, 2007.
[3] Y. J. Lu, J. Kim, H. Y. Chen, C. H. Wu, N. Dabidian, C. E. Sanders, et al., "Plasmonic Nanolaser Using Epitaxially Grown Silver Film," Science, vol. 337, pp. 450-453, Jul 2012.
[4] S. Sederberg, V. Van, and A. Y. Elezzabi, "Monolithic Integration of Plasmonic Waveguides into a Complimentary Metal-Oxide-Semiconductor- and Photonic-Compatible Platform," Applied Physics Letters, vol. 96, p. 121101, 2010.
[5] R. F. Oulton, V. J. Sorger, D. A. Genov, D. F. P. Pile, and X. Zhang, "A Hybrid Plasmonic Waveguide for Subwavelength Confinement and Long-Range Propagation," Nature Photonics, vol. 2, pp. 496-500, Aug 2008.
[6] S. Y. Zhu, T. Y. Liow, G. Q. Lo, and D. L. Kwong, "Silicon-Based Horizontal Nanoplasmonic Slot Waveguides for on-Chip Integration," Optics Express, vol. 19, pp. 8888-8902, Apr 2011.
[7] J. J. Chen, Z. Li, S. Yue, and Q. H. Gong, "Hybrid Long-Range Surface Plasmon-Polariton Modes with Tight Field Confinement Guided by Asymmetrical Waveguides," Optics Express, vol. 17, pp. 23603-23609, Dec 2009.
[8] A. V. Krasavin and A. V. Zayats, "Silicon-Based Plasmonic Waveguides," Optics Express, vol. 18, pp. 11791-11799, May 2010.
[9] J. T. Kim and S. E. Choi, "Hybrid Plasmonic Slot Waveguides With Sidewall Slope," IEEE Photonics Technology Letters, vol. 24, pp. 170-172, Feb 2012.
[10] Y. Su, Z. Zheng, Y. Bian, Y. Liu, J. Liu, J. Zhu, et al., "Low-Loss Silicon-Based Hybrid Plasmonic Waveguide With an Air Nanotrench for Sub-Wavelength Mode Confinement," Micro & Nano Letters, vol. 6, p. 643, 2011.
[11] G. Zhou, T. Wang, P. Cao, H. Xie, F. F. Liu, Y. K. Su, et al., "Design of Plasmon Waveguide with Strong Field Confinement and Low Loss for Nonlinearity Enhancement," in 2010 7th Ieee International Conference on Group Iv Photonics, ed New York: Ieee, 2010, pp. 69-71.
[12] H.-S. Chu, E.-P. Li, P. Bai, and R. Hegde, "Optical Performance of Single-Mode Hybrid Dielectric-Loaded Plasmonic Waveguide-Based Components," Applied Physics Letters, vol. 96, p. 221103, 2010.
[13] J. W. Wang, X. W. Guan, Y. R. He, Y. C. Shi, Z. C. Wang, S. L. He, et al., "Sub-mu m(2) Power Splitters by Using Silicon Hybrid Plasmonic Waveguides," Optics Express, vol. 19, pp. 838-847, Jan 2011.
[14] J. Xiao, J. Liu, Z. Zheng, Y. Bian, and G. Wang, "Design and Analysis of a Nanostructure Grating Based on a Hybrid Plasmonic Slot Waveguide," Journal of Optics, vol. 13, p. 105001, 2011.
[15] 黃民鈞, "Design and Analysis of Low Loss High Confinement Hybrid Surface Plasmon Polariton Waveguides," Master Thesis, Department of Engineering and System Science, National Tsing Hua University, 2012.
[16] 邱國斌、蔡定平, "金屬表面電漿簡介," 物理雙月刊（廿八卷二期）, 2006.
[17] www.chemicalbook.com