在覆晶封裝中，電遷移伴隨著熱遷移的效應的研究已經有一段時間。然而以往熱遷移的文獻中，關於產生的機制只假設有溫度梯度發生時，熱遷移的現象就會發生；然而在本論文中，我們驗證了環境溫度將對熱遷移的產生有一定的影響。 由於覆晶封裝的結構上，導線在基板端與試片端進入焊錫球的截面積不同，以及上下導線本身的截面積差，使得在通電時產生的焦耳熱不同，進而建立起基板與試片間的溫度梯度。在試片的材料中，我們選用高鉛/共晶錫鉛複合式覆晶封裝試片來做熱電遷移試驗。錫鉛銲錫在觀察熱遷移時是個很方便的材料，因為在電子顯微鏡中，錫鉛的對比非常明顯，使得在觀察錫鉛相分離時會變得很容易。
在此研究中，我們藉由通予1安培的電流在試片上建立溫度梯度並觀察在熱電遷移影響下的焊錫微結構變化，分別測試五種環境溫度，分別為100˚C, 125˚C, 150˚C, 160˚C and 175˚C 並分別觀察在溫度梯度下通電的焊錫及在通電焊錫的周圍單只純受到溫度梯度影響的焊錫。研究結果顯示，當環境溫度在低於125 ˚C時，即使溫度梯度達到 2580 ˚C/cm ，焊錫的熱遷移並沒有發生；然而，當環境溫度在高於150˚C時，鉛原子被發現往冷端移動而錫原子往熱端移動，證明有熱遷移的現象，我們利用背向應力的觀念來解釋此現象，並經由理論的計算，發覺當環境溫度越高時，誘發熱遷移所需要的溫度差越小， 且理論計算出在150C附近存在一個臨界溫度能誘發電遷移，此理論結算與我們的實驗結果相符合。
而在通電的焊錫球中，我們發現非對稱的相分布出現在100˚C和125˚C的試片中，此乃因為在此兩溫度下，無熱遷移得發生，導致電遷移所產生的極化效應(polarity effect)被觀察到。然而當環境溫度為而在150˚C和160˚C時，我們發現了對稱得相分布存在焊錫中，歸咎為熱遷移的驅動力大於電遷移的驅動力。當溫度進而升高至175˚C時，雖然有熱遷移的現象，但由於電遷移大於熱遷移驅動力，導致非對稱的相分布再次被觀察到。除此之外，我們觀察到在基板端有孔洞的生成，這是由於基板端沒有鎳層當作擴散阻擋層，而使得基板端銅原子快速擴散到焊錫中，而造成大量的錫銅介金屬化合物生成而使得孔洞更容易生成並且擴展。然而在試片上端，由於有較厚之鎳層(~5μm)來分散在轉折處的不均勻的電流分布，使得電流壅擠的效應下降，而較難看到孔洞生成在晶片端。

Thermomigration in flip chip solder joints accompanied by electromigration had been reported in several years; however, not many studies focus on the influence of ambient temperature on thermomigration of solder joints. To understand how ambient temperature affects the microstructural evolution of solders, a constant current of 1A was applied on the composite 95%Pb5%Sn- eutectic SnPb flip chip specimens to establish a temperature gradient for five ambient temperatures, i.e. 100˚C, 125˚C, 150˚C, 160˚C and 175˚C. The results show that no microstructural evolution of unpowered solders was found for samples tested at ambient temperature of 100˚C and 125˚C; whereas thermomigration induced phase separation was observed for samples tested at 150, 160 and 170 ˚C, suggesting that the thermomigration only occurred when the ambient temperature was higher than 150˚C. We explained this phenomenon by the effect of back stress. After considering the contribution of a stress gradient and a temperature gradient on the mass transport, the threshold temperature difference needed to trigger thermomigration is found to be decreased with increasing the ambient temperature. In addition, given that temperature gradient of 2580 ˚C/cm the theoretical calculation indicated that a threshold temperature to trigger thermomigration is about 150˚C, which is consistent with our experimental results. For the powered solder bumps, since no thermomigration occurred at 100˚C and 125˚C, only electromigration happened and the asymmetrical phase distribution of the pair of bumps was observed due to polarity effect. However, when tested ambient temperature is 150 ˚C and 160 ˚C, the symmetrical phase distribution of the pair of bumps was found. We proposed that this symmetrical phase separation for bumps test 150 ˚C and 160 ˚C is because the driving force of thermomigration is larger than that of electromigration. When the ambient temperature further increases to 175 ˚C, the electromigration become dominant, thus asymmetrical phase distribution of the pair of bumps was observed again. Furthermore, electromigration induced void formation was found at the solder/ IMC interface near the substrate side instead of chip side, which is believed to be because the samples used in this study possess thicker Ni UBM on the chip side and lack Ni diffusion barrier on the substrate side.

摘要 I
Abstract III
致謝…………………………………………… …………………………………… V
Table of Content VI
List of Figures VIII
List of Tables XII
Chapter 1 Introduction 1
Chapter 2 Literature Review 3
2.1 Leaded solder 3
2.2 Electromigration 6
2.3 Thermomigration 11
2.4 Flip chip technology 17
2.5 Joule heating 20
Chapter 3 Experimental Details 26
3.1 Specimen processes 26
3.2 Experimental Setup 28
3.2.1 Temperature gradient setup and thermomigration test 28
3.2.2 Joule heating test 32
Chapter 4 Experimental Results 33
4.1 Joule heating measurement 36
4.2 Resistance and Morphology evolution of composite solder bumps tested at 100˚C 38
4.2.1 Current stressing bumps and RVT curve at 100 oC 38
4.2.2 Un-powered bumps and isothermal annealed bump at 100 oC 42
4.3 Resistance and Morphology evolution of composite solder bumps tested at 125˚C 45
4.3.1 Current stressing bumps and RVT curve at 125 oC 45
4.3.2 Un-powered bumps and isothermal annealed bump at 125 oC 49
4.4 Resistance and Morphology evolution of composite solder bumps tested at 150˚C 52
4.4.1 Current stressing bumps and RVT curve at 150 oC 52
4.4.2 Un-powered bumps and isothermal annealing at 150 ˚C 56
4.5 Resistance and Morphology evolution of composite solder bumps tested at 160˚C 59
4.5.1 Current stressing bumps and RVT curve at 160 ˚C 59
4.5.2 Un-powered bumps and isothermal annealed bump at 160 ˚C 63
4.6 Resistance and Morphology evolution of composite solder bumps tested at 175˚C 66
4.6.2 Un-powered bumps and isothermal annealed bump at 175˚C 70
Chapter 5 Discussions 73
5.1 Effect of ambient temperature on thermomigration in unpowered bumps 73
5.2 Effect of temperature on stressed bumps under electromigration 80
5.2.1 Polarity effect at different temperatures under current stressing 80
5.2.2 Voids formation at the substrate sides 84
Chapter 6 Conclusions 85
Reference…………………………………………………………………………......90

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