半導體產業中的無廠半導體晶片設計公司雖然是處於上游產業鏈的高毛利率產業，但在今時今日面對著終端消費者對多元化產品的喜好隨之變化和客戶需求急劇變化速度的情況下，無廠半導體晶片設計公司的產能調配、生產時間的減少成為了一個必須要妥善考量的課題。
無廠半導體晶片設計公司的競爭核心的主要在於創新開發與產能整合。準時且及時交付產品是公司在行業中的競爭力指標。而無廠半導體晶片設計公司要在固定的產能及時間內能有效地利用產能規劃技術及高效率的測試和生產水準來達到交貨需求不僅是個重要的內部績效指標也是一個向晶片需求客戶展示公司在供應商產能規劃及方面的能力。
利用精實管理的方法減少閒置時間的浪費與制做紫式決策的根本目標網絡來達成績效指標的目標，由 IC 設計公司制做預定排程計劃替換現有測代工廠隨機規劃來提升整體晶圓測試產出、縮短晶圓測試生產時間，以達到降低 IC 設計公司生產成本、提升單位時間產出的規劃。
關鍵詞 : 精實管理、根本目標網絡、產能規劃、晶圓測試

Fabless semiconductor IC design house are high-margin industries in the upstream of semiconductor industry. But today fabless IC design houses are facing huge challenges of end-product diversity with the changing preferences of end consumers. The production capacity allocation and production time reduction has become a topic that must be properly considered of fabless IC design house.
The core competitiveness of fabless IC design house mainly lies in innovative development and productivity integration. The fabless IC design house must effectively utilize capacity planning technology, high-efficiency testing and production levels within a fixed capacity and time to meet delivery requirements. This is not only an important internal performance indicator but also a evidence to show customers that its ability to control capacity and suppliers in aspect.
By using Lean Management to reduce the waste of time and to create a UNISON framework fundamental-objectives network to achieve performance of indicator goals. By using devices allocation plan which generated by IC design house to instead of current random OSAT allocation plan to enhance overall wafer production amount、shorten the wafer testing time in order to reduce the testing cost of IC design house and increase the throughput.
Keywords : Lean Management、Fundamental Objectives Framework、Capacity Plan、Wafer Probing.

摘要 I
Abstract II
誌謝 III
目錄 IV
圖目錄 Ⅷ
表目錄 XI
第1章 緒論 1
1.1 研究背景 1
1.2 研究動機 2
1.3 研究目的 4
1.4 研究流程 6
第2章 文獻探討 8
2.1 精實生產 8
2.1.1 精實生產對 IC 測試的影響 9
2.1.2 精實生產活動導入生產流程 10
2.1.3 MTS-MTO模型的應用 13
2.2 生產流程變更 14
2.3 晶圓測試良率的重要性 17
2.4 紫式決策根本目標工具網絡 18
2.4.1 紫式決策 根本目標分析架構 18
2.4.2 瞭解問題 18
2.4.3 根本目標 18
2.4.4 評估指標 19
2.4.5 工具目標 19
2.4.6 判斷、權衡與決策 19
第3章 研究方法 21
3.1 測試現況分析 21
3.1.1 晶圓針測歷史資料分析 21
3.1.2 針測機清針模式分析 24
3.2 實驗設計 27
3.3 建構紫式決策根本目標網絡 31
3.3.1時間效益 32
3.3.2 測試品質效益 33
3.3.3 硬體可靠度效益 34
3.3.4 產品指派效益 36
3.3.5 生產流程變更全面效益分析 38
3.4 生產流程劃制定 39
第4章 案例研究 40
4.1 協同整合產線生產計劃 40
4.2 制定工程變更導入生產計劃 40
4.2.1 機台資源計劃架構制定 41
4.2.2 資源計劃架構資料 42
4.2.3 生產流程變更測試計劃檢驗 43
4.2.4 生產流程劃下各機台產品型號設定 43
4.3 生產流程變更後機台測試時間資料收集與分析 45
4.3.1 測試時間資料收集 45
4.3.2 測試時間資料比較 46
4.3.3 FlexSim模擬比較 47
第5章 結論與未來展望 51
5.1 研究結論 51
5.2未來展望 52
參考文獻 53

1. Browning, T. R., & Heath, R. D. (2009). Reconceptualizing the effects of lean on production costs with evidence from the F-22 program. Journal of operations management, 27(1), 23-44.
2. Carballo, J. A., Chan, W. T. J., Gargini, P. A., Kahng, A. B., & Nath, S. (2014, October). ITRS 2.0: Toward a re-framing of the Semiconductor Technology Roadmap. In 2014 IEEE 32nd international conference on computer design (ICCD) (pp. 139-146). IEEE.
3. CHAI, L. B. (2021). CRITICAL SUCCESS FACTOR OF LEAN SIX SIGMA DEPLOYMENT IN A SEMICONDUCTOR MANUFACTURING FIRM: A CASE STUDY.
4. Chen, J. C., Chen, T. L., Hu, H. Y., Peng, P., & Lin, T. (2022). Multiobjective Order Promising for Outsourcing Supply Network of IC Design Houses. IEEE Transactions on Semiconductor Manufacturing, 35(4), 680-697.
5. Chen, J. C., Cheng, C. H., & Huang, P. B. (2013). Supply chain management with lean production and RFID application: A case study. Expert Systems with applications, 40(9), 3389-3397.
6. Chen, J. C., Chen, C. W., Lin, C. J., & Rau, H. (2005). Capacity planning with capability for multiple semiconductor manufacturing fabs. Computers & Industrial Engineering, 48(4), 709-732.
7. Chien, C. F., Kuo, C. J., & Yu, C. M. (2020). Tool allocation to smooth work-in-process for cycle time reduction and an empirical study. Annals of Operations Research, 290, 1009-1033.
8. Christopher, M., & Lee, H. (2004). Mitigating supply chain risk through improved confidence. International journal of physical distribution & logistics management, 34(5), 388-396.
9. De Backer, K., Huang, R. J., Lertchaitawee, M., Mancini, M., & Tan, C. L. (2018). Taking the next leap forward in semiconductor yield improvement.
10. Dempsey, M., Geitner, L., Brennan, A., & McAvoy, J. (2021). A review of the success and failure factors for change management. IEEE Engineering Management Review, 50(1), 85-93.
11. Dolgui, A., & Proth, J. M. (2013). Outsourcing: definitions and analysis. International Journal of Production Research, 51(23-24), 6769-6777.
12. Fan, S. K. S., & Chiu, S. H. (2024). A new ViT-Based augmentation framework for wafer map defect classification to enhance the resilience of semiconductor supply chains. International Journal of Production Economics, 273, 109275.
13. Fu, W., Chien, C. F., & Chen, C. H. (2023). Advanced quality control for probe precision forming to empower virtual vertical integration for semiconductor manufacturing. Computers & Industrial Engineering, 183, 109461.
14. Fu, W., & Chien, C. F. (2019). UNISON data-driven intermittent demand forecast framework to empower supply chain resilience and an empirical study in electronics distribution. Computers & Industrial Engineering, 135, 940-949.
15. Gelrud, Y. D., & Loginovskiy, O. V. (2016, May). Project management for different stakeholders. In 2016 2nd International Conference on Industrial Engineering, Applications and Manufacturing (ICIEAM) (pp. 1-5). IEEE.
16. Grochowski, A., Bhattacharya, D., Viswanathan, T. R., & Laker, K. (1997). Integrated circuit testing for quality assurance in manufacturing: history, current status, and future trends. IEEE Transactions on Circuits and Systems II: Analog and Digital Signal Processing, 44(8), 610-633.
17. Gupta, P., & Papadopoulou, E. (2008). Yield analysis and optimization. In Handbook of Algorithms for Physical Design Automation (pp. 771-790). Auerbach Publications.
18. Kuo, H. A., & Chien, C. F. (2023). Semiconductor capacity expansion based on forecast evolution and mini-max regret strategy for smart production under demand uncertainty. Computers & Industrial Engineering, 177, 109077.
19. Hung, H. C., Chiu, Y. C., & Wu, M. C. (2017). Analysis of competition between IDM and fabless–foundry business models in the semiconductor industry. IEEE Transactions on Semiconductor Manufacturing, 30(3), 254-260.
20. Leachman, R. C., Ding, S., & Chien, C. F. (2007). Economic efficiency analysis of wafer fabrication. IEEE Transactions on Automation Science and Engineering, 4(4), 501-512.
21. Leu, J. D., & Liu, F. P. (2022, December). Capacity planning of the semiconductors manufacturing supply chain: A decision method and application. In 2022 IEEE International Conference on Industrial Engineering and Engineering Management (IEEM) (pp. 832-836). IEEE.
22. Li, A. D., & He, Z. (2020). Multiobjective feature selection for key quality characteristic identification in production processes using a nondominated-sorting-based whale optimization algorithm. Computers & Industrial Engineering, 149, 106852.
23. Lin, J. T., & Lu, Y. C. (2001). A production planning system for IC design house. Journal of the Chinese Institute of Industrial Engineers, 18(4), 111-129.
24. Lu, W. M., Wang, W. K., Tung, W. T., & Lin, F. (2010). Capability and efficiency of intellectual capital: The case of fabless companies in Taiwan. Expert Systems with Applications, 37(1), 546-555.
25. Macwan, S., Quek, J., Rogers, S., & De Zwart, M. (2021, May). Fabless Semiconductor Challenge–Internal Stakeholder Alignment Improvements. In 2021 32nd Annual SEMI Advanced Semiconductor Manufacturing Conference (ASMC) (pp. 1-4). IEEE.
26. Malone, T. W. (2004). The Future of Work (Harvard Business School Press, Boston, MA).
27. Mhiri, E., Mangione, F., Jacomino, M., Vialletelle, P., & Lepelletier, G. (2018). Heuristic algorithm for a WIP projection problem at finite capacity in semiconductor manufacturing. IEEE Transactions on Semiconductor Manufacturing, 31(1), 62-75.
28. Neiger, D., Rotaru, K., & Churilov, L. (2009). Supply chain risk identification with value-focused process engineering. Journal of operations management, 27(2), 154-168.
29. Ozelkan, E. C., & Cakanyildirim, M. (2006). Test wafer management for semiconductor manufacturing. IEEE transactions on semiconductor manufacturing, 19(2), 241-251.
30. Pangarkar, N., & Prabhudesai, R. (2024). Using Porter's Five Forces analysis to drive strategy. Global Business and Organizational Excellence, 43(5), 24-34.
31. 任恒毅, & 廖秀姬. (2008). 精實生產價值溪流程改善方法之實證研究-以某汽車空調製造商為例. 品質學報, 15(5), 323-336.
32. 簡禎富，(2015)。《決策分析與管理》。雙葉書廊有限公司。