本研究旨在開發一種新型的TiNiSi金屬合金界面層，透過簡化傳統多層金屬結構為雙層結構，以改善N-type 4H-SiC元件的金半接觸性能。文中重點探討了在降低製程熱預算和複雜性的同時，如何有條理的確認歐姆接觸的形成以及防止在退火過程中可能產生的自由碳對元件造成的損害。通過電性能測試和微觀結構的分析，本研究展示了TiNiSi合金在低熱預算條件下仍有效形成歐姆接觸的能力，並為SiC元件在極端條件下的應用提供了新的策略。
論文深入探討了金屬-半導體接面的行為，特別是金屬選擇和界面層反應厚度的重要性。此外，研究在N-type 4H-SiC基板（摻雜濃度約為3×10^18 cm^-3）上，探討了歐姆接觸的形成機制，並成功實現了極低的特定接觸電阻（ρc=4.82×10^-4 Ω·cm^2）。
全文涵蓋了從理論基礎到實驗驗證的完整過程，包括對歐姆接觸和蕭特基接觸的詳細介紹，傳輸線模型分析，以及元件製程控制的詳細說明。此外，透過最簡化製程步驟來降低整體製程熱預算，從而提升製程的成本效益。第五章中對元件的電性能和材料特性進行了深入的測量與分析，進一步驗證了TiNiSi 界面反應層的優異品質。此研究不僅加深了我們對金屬-半導體界面反應的理解，也為提高SiC 元件的接觸效率提供了實用的技術路徑。

This study aims to develop a novel TiNiSi alloy interface layer, simplifying the traditional multilayer metal structures into a bilayer configuration to improve the metal-semiconductor contact performance of N-type 4H-SiC devices. The paper focuses on systematically ensuring the formation of ohmic contact while reducing the thermal budget and complexity of the process, as well as preventing potential damage caused by free carbon during the annealing process. Through electrical performance testing and microstructural analysis, this study demonstrates the ability of the TiNiSi alloy to effectively form Ohmic contact under low thermal budget conditions, providing new strategies for the application of SiC devices under extreme conditions.
The thesis delves into the behavior of metal-semiconductor interface, particularly emphasizing the importance of metal selection and the reaction thickness of the interface layer. Additionally, the research explores how ohmic contacts are formed on an N-type 4H-SiC substrate with a doping concentration of around 3×10^18 cm^-3, and successfully achieves a remarkably low specific contact resistance of 4.82×10^-4 Ω·cm^2.
The document covers the entire process from theoretical foundations to experimental verification, including introduction to ohmic and Schottky contact, transmission line model analysis, and comprehensive descriptions of device process control. Moreover, the study proposes a method to simplify the process steps to reduce the overall thermal budget, thereby enhancing the cost-effectiveness of the manufacturing process. Chapter five presents in-depth measurements and analyses of the electrical performance and material characteristics of the devices, further validating the exceptional quality of the TiNiSi interface reaction layer. This research not only deepens our understanding of metal-semiconductor interface reactions but also provides practical technological pathways for improving the contact efficiency of SiC devices.

封 面
摘 要
致 謝
目 錄
第 1 章 序論.........................................................1
1.1 綜述: 論文主要目的.............................................1
1.2 研究目標......................................................3
1.3 工作的重要性...................................................4
1.4 論文架構......................................................5
第 2 章 文獻回顧......................................................6
2.1 歷史背景......................................................6
2.2 西元 2000 年以前...............................................8
2.3 西元 2000 至 2009 年..........................................9
2.4 西元 2010 至 2019 年.........................................11
2.5 西元 2020 年之後..............................................12
第 3 章 基礎理論 ....................................................14
3.1 金屬-半導體接面探討:「歐姆接觸」...............................14
3.2 金屬-半導體接面探討:「蕭特基接觸」..............................15
3.3 半導體摻雜與金屬-半導體接面之關係...............................17
3.4 n 型 SiC 金屬-半導體接面......................................19
3.5 特定接觸電阻 ρc...............................................20
3.6 接觸電阻之分析方法-傳輸線模型 TLM..............................22
3.6.1 傳輸線模型分析..............................................22
3.7 材料分析工作原理..............................................27
3.7.1 Raman......................................................27
3.7.2 XPS........................................................28
3.7.3 AFM........................................................29
3.7.4 SIMS.......................................................30
第 4 章 元件製程與製程參數控制........................................32
4.1 N 型 SiC 元件之製程步驟.......................................32
4.2 濕式標準清潔法 (RCA Clean)....................................32
4.2.1 污染物對半導體元件電性的影響.................................33
4.2.2 濕式清潔法常用的化學藥劑.....................................35
4.2.3 濕式蝕刻之簡介..............................................36
4.3 DLP 黃光微影技術..............................................37
4.4 E-gun 蒸鍍系統...............................................39
4.5 舉離 (Lift off) 製程.........................................41
4.6 快速熱退火 (RTA) 製程.........................................42
4.7 電性能量測系統................................................43
第 5 章 研究結果與數據分析............................................45
5.1 元件量測結果與分析............................................45
5.1.1 元件膜厚與退火溫度之分析-Ti/TiNiSi...........................45
5.1.2 元件電性分析-Ti/TiNiSi......................................49
5.1.3 元件電性分析-Ni/TiNiSi......................................52
5.2 材料分析.....................................................59
第 6 章 論文總結與未來展望............................................64
參考文獻............................................................65

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