隨著量子技術的興起，對高靈敏度光偵測器的需求日漸增加，促使單光子偵測器的發展。單光子雪崩崩潰二極體(Single Photon Avalanche Diode, SPAD)為現今最常見的單光子偵測器之一，利用接面空乏區中的載子發生碰撞離子化(Impact Ionization)來放大光生電流。然而單光子雪崩崩潰二極體通常需要在十幾伏特以上的操作電壓下運行，需要額外的升壓電路(Boost Converter)和降壓電路(Buck Converter)，增加系統的複雜性及功耗。因此本研究使用單光子雪崩崩潰電晶體(Single Photon Avalanche Transistor, SPAT)作為光偵測器，以降低操作電壓。
本實驗室曾於標準SiGe BiCMOS製程中提出新型的單光子雪崩崩潰電晶體，利用矽鍺異質接面作為雙極性電晶體的基極，不僅可以增加元件的內部增益，同時還因矽鍺材料的吸收係數較高能夠充分利用大多數入射的光子。將電晶體的基極設置成浮接狀態使得電洞可以累積於基極並抬升電位，因此BE接面為順偏便會有大量的電子從射極注入至集極，降低集極與射極間的崩潰電壓BVCEO。
本研究將先前提出的光電晶體作進一步的分析與模擬，藉此釐清矽鍺異質接面雙極性光電晶體於穩態(Steady State)及暫態(Transient State)時的物理機制。在穩態時，設計多種結構的光電晶體，探討結構與崩潰電壓之間的關係，並找出崩潰電壓較低的光電晶體使操作電壓下降，利於實驗室後續設計整體電路時降低功率損耗。在暫態時，研究元件發生崩潰過程中的物理機制及暗計數較低的原因 ，有助於設計出更完善的主動式截止電路(Active Quenching Circuit)來截止光電晶體的崩潰電流。

With the rise of quantum technology, the demand for high-responsivity light detectors is increasing, prompting the development of single photon detectors. Single Photon Avalanche Diode (SPAD) is one of the most common single photon detectors. It uses the impact ionization of carriers in the depletion region to amplify the photogenerated current. The operating voltage of SPAD is usually more than ten volts, requiring an additional circuit, increasing system complexity and power consumption. Hence, this study employs a Single Photon Avalanche Transistor (SPAT) as a light detector to minimize the required operational voltage.
Our laboratory has proposed SPAT in the standard SiGe BiCMOS process. Using a silicon-germanium (SiGe) heterojunction as the base of the BJT not only enhances the gain of the device but also takes advantage of the higher absorption coefficient of SiGe material, effectively utilizing most incident photons. Setting the base to a floating state allows holes to accumulate and raise the potential. Hence, the BE junction is forward-biased; many electrons will be injected from the emitter to the collector, reducing the breakdown voltage BVCEO.
This study further analyzes and simulates the previously proposed photodetectors to clarify the physical mechanism of the HBT(heterojunction bipolar transistor) in steady and transient states. In the steady state, designing photodetectors of various structures, exploring the relationship between structure and breakdown voltage, and finding the device structures with lower breakdown voltages that reduce the operating voltage will help reduce power consumption when the laboratory designs the overall circuit. In the transient state, studying the physical mechanism during breakdown and the reason for the low dark count will help to design a complete active quenching circuit to quench the breakdown current of the phototransistor.

致謝 I
摘要 II
Abstract III
目錄 V
圖目錄 VIII
表目錄 XI
第一章 前言 1
1.1 研究背景與發展現況 1
1.2 研究動機 3
1.3 論文章節架構 5
第二章 半導體光偵測器原理與特性 6
2.1 半導體光吸收原理 6
2.1.1 基本原理 6
2.1.2 半導體材料感光原理 7
2.2 光偵測器原理 11
2.2.1 光電二極體原理 11
2.2.2 雙極性光電晶體原理 12
2.2.3 單光子偵測器原理 13
2.3 矽鍺異質接面材料特性 17
2.3.1 矽鍺材料之晶格結構 17
2.3.2 矽鍺材料之能帶結構 19
2.3.3 矽鍺基極電晶體 20
2.4 光偵測器特性 23
2.4.1 暗電流(Dark Current) 23
2.4.2 量子效率(Quantum Efficiency) 26
2.4.3 響應度(Responsivity) 27
2.4.4 響應速度(Response Time) 28
2.4.5 暗計數(Dark Count) 29
第三章 光電晶體結構與元件特性 33
3.1 半導體接面 34
3.1.1 同質異型接面 34
3.1.2 異質異型接面 35
3.2 異質接面光電晶體 41
3.2.2 電流分析 41
3.2.2 雪崩崩潰(Avalanche Breakdown) 43
3.3 暫態分析 45
3.3.1 倍增因素(Multiplication Factor, M) 45
3.2.2 基極電位對時間變化 47
第四章 光電晶體設計與模擬 52
4.1 模擬結構 52
4.2 穩態模擬 55
4.2.1 電性模擬 55
4.2.2 吸收係數(Absorption Coefficient) 58
4.2.3 崩潰電壓模擬 60
4.3 暫態模擬 69
4.4 量測結果與分析 76
4.4.1 量測儀器介紹 76
4.4.2 量測方式 76
4.4.3 量測結果 78
第五章 結論與後續研究建議 81
5.1 結論 81
5.2 後續研究建議 82
參考文獻 83
附錄 86

[1] C. Niclass, A. Rochas, P. . -A. Besse and E. Charbon, “Design and characterization of a CMOS 3-D image sensor based on single photon avalanche diodes,” in IEEE Journal of Solid-State Circuits, vol. 40, no. 9, pp. 1847-1854, Sept. 2005, doi: 10.1109/JSSC.2005.848173.
[2] D. Stoppa, D. Mosconi, L. Pancheri and L. Gonzo, “Single-Photon Avalanche Diode CMOS Sensor for Time-Resolved Fluorescence Measurements,” in IEEE Sensors Journal, vol. 9, no. 9, pp. 1084-1090, Sept. 2009, doi: 10.1109/JSEN.2009.2025581.
[3] C. Niclass, M. Soga, H. Matsubara, S. Kato and M. Kagami, “A 100-m Range 10-Frame/s 340 ×96-Pixel Time-of-Flight Depth Sensor in 0.18-μm CMOS,” in IEEE Journal of Solid-State Circuits, vol. 48, no. 2, pp. 559-572, Feb. 2013, doi: 10.1109/JSSC.2012.2227607.
[4] S. M. Sze, “Semiconductor Device Physics and Technology”, 2nd & 3rd ed., John Wiley & Sons Inc.
[5] 嚴浩天, “砷化銦鎵光崩潰二極體於單光子偵測器之應用” 國立交通大學, 電子工程系所, 碩士論文, 中華民國九十六年八月
[6] B. F. Aull et al., “Geiger-mode avalanche photodiodes for three-dimensional imaging”, Lincoln Lab. J., vol. 13, no. 2, pp. 335-349, 2002.
[7] Donald A.Neaman , “Semiconductor Physics and Devices: Basic Principles”, 4th ed., 2012, McGraw-Hill
[8] Peter Ashburn, “SiGe Heterojunction Bipolar Transistors.”, John Wiley & Sons, Inc. 2003.
[9] 吳昭羲, “平臺式矽鍺異質接面雙載子電晶體研製與分析” 國立中央大學, 電機工程研究所, 碩士論文, 中華民國九十四年六月
[10] T. Goudon, V. Miljanović and C. Schmeiser, “On the Shockley-Read-Hall model: Generation-recombination in semiconductors”, SIAM J. Appl. Math., vol. 67, no. 4, pp. 1183-1201, 2007.
[11] S. Radovanovic, A.-J. Annema and B. Nauta, “High-Speed Photodiodes in Standard CMOS Technology”, Berlin, Germany:Springer-Verlag, 2008.
[12] T.-J. King, J. Mcvittie, K. Saraswat and J. Pfiester, “Electrical properties of heavily doped polycrystalline silicon-germanium films”, IEEE Trans. Electron Devices, vol. 41, no. 2, pp. 228-232, 1994.
[13] S. C. Jain, J. Poortmans, S. S. Iyer, J. J. Loferski, J. Nijs, R. Mertens, et al., “ Electrical and optical bandgaps of GexSi1-x strained layers” , IEEE Trans. Electron Devices, vol. 40, pp. 2338-2343, Dec. 1993.
[14] M. Reisch, "On bistable behavior and open-base breakdown of bipolar transistors in the avalanche regime-modeling and applications", IEEE Transactions on Electron Devices, vol. 39, no. 6, pp. 1398-1409, 1992.
[15] S. M. Sze, “Physics of Semiconductor Devices”, 2nd ed., John Wiley & Sons, Inc, 1981
[16] Silvano Donati, “Photodetectors: Devices, Circuits and Applications”, 1st ed., Prentice Hall, 2000
[17] 黃憲彬, “單光子崩潰電晶體與主動式截止電路” 國立清華大學, 電子工程研究所, 碩士論文, 中華民國一百一十年十二月
[18] 張雅森, “具有Body-strapped Base的雙極光電晶體特性研究” 國立清華大學, 電子工程研究所, 碩士論文, 中華民國一百零六年一月
[19] 沈昇鴻,” 標準SiGe BiCMOS製程中實現高響應度及高速光偵測電晶體” 國立清華大學, 電子工程研究所, 碩士論文, 中華民國一百零四年七月
[20] M. Reisch, “Carrier multiplication and avalanche breakdown in self-aligned bipolar transistors”, Solid State Electron., vol. 33, no. 2, pp. 189-197, 1990.
[21] J.-W. Han et al., “Trigger and self-latch mechanisms of n-p-n bistable resistor”, IEEE Electron Device Letters, vol. 35, no. 3, pp. 387-389, 2014.