三維積體電路技術是半導體行業創新的核心，受到持續追求高性能和空間效率的推動。這項技術改變了芯片的設計和製造方式，實現了高度的功能整合，提升系統性能和多功能性。此外，它可以縮短信號傳播路徑，增加信號帶寬，同時降低功耗和成本。此外，它提供了更大的設計靈活性，有助於異構整合。在本篇論文中我們已經引入了一種針對面對面三維積體電路設計量身定制的詳細放置方法。主要目標是在考慮晶片間終端數量及其對線路長度的影響的情況下減少線路總長度。我們的方法包括三個主要步驟：單元重新分配、合法化和三維詳細放置。首先，我們優化具有晶片間連接的電路網，以最小化線長總和。其次，我們為晶片間終端設置位置，以使線長增量最小化，並為設計創建一個合法的放置解決方案。最後，在保持放置合法性的同時，我們將電路元件移動到具有較低線長的區域和晶片中。在實驗結果部分，我們也展示了本文提出的方法可以提高放置質量。

The 3D-IC (Three-Dimensional Integrated Circuit) technology is at the heart of innovations in the semiconductor industry, driven by an ongoing pursuit of high performance and spatial efficiency. This technology transforms how chips are designed and manufactured and facilitates a high degree of functional integration, enhancing system performance and versatility. Moreover, it can shorten signal propagation paths and increase bandwidth while reducing power consumption and costs. Additionally, it provides greater design flexibility, contributing to heterogeneous integration. This thesis proposes a detailed placement method for Face-to-Face (F2F) 3D-IC design. The primary objective is to reduce HPWL while considering the number of inter-die terminals and their impact on HPWL. Our approach includes three primary stages: cell reassignment, legalization, and 3D detailed placement. Firstly, we optimize nets with inter-die connections to minimize HPWL. Secondly, we set positions for the inter-die terminals with the least HPWL increment and create a legal placement solution for the design. Lastly, while maintaining the placement's legality, we move cells to regions and dies with a reduced HPWL. In the experimental results section, we have demonstrated that the method proposed in this thesis enhances the placement quality.

誌謝
摘要i
Abstract ii
1 Introduction 1
1.1 Motivations . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
1.2 Previous Works . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2
1.3 Contributions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3
1.4 Organization . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3
2 Preliminaries 5
2.1 Problem Formulation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
3 Proposed Approach 7
3.1 Overall Flow . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
3.2 Cell Reassignment . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
3.3 Terminal Legalization . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
3.3.1 Set Terminal Positions . . . . . . . . . . . . . . . . . . . . . . . . . . 13
3.3.2 Legalize Terminals . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
3.4 Global Move . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
3.5 Vertical Move . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
4 Experimental Results 23
4.1 Experimental Setting . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23
4.2 Results . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24
5 Conclusion 29
Bibliography 31

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