三維異質整合 (Heterogeneous integration) 是一個新興的研究方向，透過整合不同的製程技術可以帶來許多優勢，例如減少成本、增加性能等。由於這個全新的領域誕生，傳統的設計方法面臨困境。在分區領域，從傳統的單一平面，到三維的架構有許多新的挑戰產生。如何在滿足使用者制定的條件下可以獲得最小成本是我們所要解決的問題。在實際執行時的兩種條件: 反應時間 (Response time) 與吞吐量 (Throughput)，是我們對於一個應用最直接的衡量標準。在這篇論文中，我們探討在上述兩種條件下，我們如何透過啟發式演算法來得到接近最佳解的成果，並且分析我們如何得到這些結果。

3D heterogeneous integration is an emerging research direction,through the integration of different process technologies can bring many advantages, such as reducing costs and increasing performance. As this new field was born, traditional design methods faced difficulties. In partitioning, many new challenges arise from the traditional single plane to the three-dimensional architecture. How to obtain the minimum cost under the conditions specified by the user is the problem we want to solve. Two conditions during actual execution: response time and throughput, are our most direct measurement criteria for an application. In this paper, we explore how we use heuristic algorithms to get close to the optimal solution under the above two conditions and analyze how we get these results.

Contents
Acknowledgments
摘要 i
Abstract ii
1 Introduction 1
2 Previous Work 3
2.1 Previous Work . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3
2.2 Motivation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
3 Preliminaries 9
3.1 Area . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
3.2 Latency and Throughput . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
3.3 Cost . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
3.4 Through Silicon-Via (TSV) . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
3.5 Task . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
3.6 Problem Definition . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
4 The Proposed Method 14
4.1 A Heuristic Algorithm . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
5 Experimental Results 18
5.1 Generation of Timing Constraints . . . . . . . . . . . . . . . . . . . . . . . . 18
5.1.1 The Critical Throughput Constraint . . . . . . . . . . . . . . . . . . . 19
5.1.2 The Critical Response Time Constraint . . . . . . . . . . . . . . . . . 19
5.1.3 Task Constraint Generation . . . . . . . . . . . . . . . . . . . . . . . 20
5.2 Experimental Setup . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
5.3 Experimental Results . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
6 Conclusions 28
References 29

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