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作者(中文):林致佑
作者(外文):Lin, Chih-Yu.
論文名稱(中文):以FPGA實現雙向延遲低於 600 奈秒之高頻交易風險控管硬體加速
論文名稱(外文):FPGA-based Hardware Acceleration for Risk Management in High-Frequency Trading with Bidirectional Latencies under 600 ns
指導教授(中文):馬席彬
指導教授(外文):Ma, Hsi-Pin
口試委員(中文):黃元豪
張添烜
口試委員(外文):Huang, Yuan-Hao
Chang, Tian-Sheuan
學位類別:碩士
校院名稱:國立清華大學
系所名稱:電機工程學系
學號:110061639
出版年(民國):112
畢業學年度:112
語文別:英文
論文頁數:67
中文關鍵詞:高頻交易風險控管低延遲證卷交易場效可程式化邏輯閘陣列硬體加速
外文關鍵詞:High-Frequency TradingRisk ManagementLow LatencyStock TradingFPGAHardware Acceleration
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高頻交易系統需要大幅降低延遲以有效應對市場更新並實現利潤,進一步提升整體系統的延遲將潛在地增加高頻交易者的每日淨利。本研究旨在直接建立與交易所的連接,實施風險管理技術,並透過基於可程式化邏輯閘陣列(FPGA)的硬體加速實現更低的延遲。避開了第三方應用程式介面(API)的限制,交易者能夠減少延遲並充分利用市場機會。

研究者與合作廠商皓德盛科技有限公司提出一套雙向風險管理系統,運用現場可程式化邏輯閘陣列處理訂單監控、股票庫存控制與顧客資金控管,在必要時進行封包的替換。此外,我們開發了一個整合的回補程式與硬體協同執行,在每筆交易完成後即時進行更新。經過優化,該回補程式在一秒內能處理超過1000次交易執行。我們亦發展了一個多線程的交易程式,用於簡化下單過程以及訂單執行回報的迅速處理,提供硬體開發者系統驗證的環境。

本系統採用運行於 156.25 兆赫時脈頻率下的 10G 乙太網路實體收發器,以同步 64 位元乙太網傳送器和接收器之操作。研究結果顯示,所提出的系統在客戶至交易所方向的傳輸延遲為 550 奈秒,而交易所至客戶方向則為 582 奈秒,相較於傳統基於應用程式開發介面的交易方法,效率提升了一千倍之多。
High-frequency trading (HFT) systems require a significant reduction in latency to respond effectively to market updates and generate profits. Improving the overall system latency has the potential to increase daily net profits for high-frequency traders. This study aims to bypass third-party trading application programming interfaces (APIs), establish direct connections with exchanges, implement risk management techniques, and achieve lower latency through FPGA-based hardware acceleration. By bypassing the limitations of third-party application programming interfaces (APIs), traders can reduce latency and fully capitalize on market opportunities.

In collaboration with Vsense Fintech Inc., we have developed a proposed bidirectional risk management system that leverages FPGAs to manage order monitoring, position control, and fund manipulation. Additionally, an integrated compensation program has been designed to operate in conjunction with the hardware, executing updates upon the completion of each transaction. Through optimization, this compensation program demonstrates the capability to process over 1,000 executions within a single second. We have also created a multi-threaded trading program to facilitate order placement and the retrieval of order execution results. This program plays a crucial role in verifying the functionality of the hardware.

The implemented system utilizes a 10G Ethernet physical interface operating at a clock frequency of 156.25 MHz to synchronize the 64-bit Ethernet transceiver and receiver. The results indicate that the achieved latency of the proposed system is 550 ns in the client-to-exchange direction and 582 ns in the exchange-to-client direction. This outcome signifies an improvement in efficiency by a factor of one thousand compared to conventional API-based trading methodologies.
Abstract (Chinese) II
Acknowledgements (Chinese) IV
Abstract VI
1 Introduction 1
1.1 Background . . . . . . . . . . . . . . . . . . . . . . . . 1
1.2 Motivation . . . . . . . . . . . . . . . . . . . . . . . . 3
1.3 Main Contributions . . . . . . . . . . . . . . . . . . . . . . . . 5
1.4 Organization . . . . . . . . . . . . . . . . . . . . . . . . 7
2 Background Knowledge and Literature Survey 8
2.1 Financial Information eXchange (FIX) Protocol . . . . . . . . . . . . . . . . . . . . . . . . 8
2.1.1 Message Format and Delimiter . . . . . . . . . . . . . . . . . . . . . . . . 9
2.1.2 Session Flow . . . . . . . . . . . . . . . . . . . . . . . . 10
2.1.3 Message Categories . . . . . . . . . . . . . . . . . . . . . . . . 11
2.2 Trading System . . . . . . . . . . . . . . . . . . . . . . . . 13

2.3 Risk Management . . . . . . . . . . . . . . . . . . . . . . . . 16
2.4 Related Work . . . . . . . . . . . . . . . . . . . . . . . . 17
3 Architecture Design 25
3.1 System Overview . . . . . . . . . . . . . . . . . . . . . . . . 25
3.2 Risk Management . . . . . . . . . . . . . . . . . . . . . . . . 27
3.2.1 Client to Exchange (CL2EX) Risk Management . . . . . . . . . . . . . . . . . . . . . . . . 27
3.2.2 Exchange to Client (EX2CL) Risk Management . . . . . . . . . . . . . . . . . . . . . . . . 29
3.3 Memory Management . . . . . . . . . . . . . . . . . . . . . . . . 32
3.3.1 Static Database . . . . . . . . . . . . . . . . . . . . . . . . 32
3.3.2 Dynamic Database . . . . . . . . . . . . . . . . . . . . . . . . 33
3.3.3 Dynamic Registers . . . . . . . . . . . . . . . . . . . . . . . . 34
3.4 Host Access Interface . . . . . . . . . . . . . . . . . . . . . . . . 35
4 Software Implementation and Integration 37
4.1 Compensation Program . . . . . . . . . . . . . . . . . . . . . . . . 37
4.2 Multi-threading Trading Program . . . . . . . . . . . . . . . . . . . . . . . . 44
4.3 Preload Program . . . . . . . . . . . . . . . . . . . . . . . . 47
4.4 Web GUI . . . . . . . . . . . . . . . . . . . . . . . . 48
5 Evaluation Results 49
5.1 Hardware Evaluation . . . . . . . . . . . . . . . . . . . . . . . . 49
5.1.1 Verification Methodology . . . . . . . . . . . . . . . . . . . . . . . . 49
5.1.2 Utilization of Hardware Resources . . . . . . . . . . . . . . . . . . . . . . . . 52
5.1.3 Performance Analysis . . . . . . . . . . . . . . . . . . . . . . . . 52
5.2 Software Optimization . . . . . . . . . . . . . . . . . . . . . . . . 58
5.2.1 Compensation Program . . . . . . . . . . . . . . . . . . . . . . . . 58
5.2.2 Preload Program . . . . . . . . . . . . . . . . . . . . . . . . 59
6 Conclusions and Future Works 61
6.1 Conclusions . . . . . . . . . . . . . . . . . . . . . . . . 61
6.2 Future Works . . . . . . . . . . . . . . . . . . . . . . . . 62
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