本論文第一部分研究了不同製程下的4H-SiC Enhancement-NMOS/PMOS/Depletion-NMOS的電性差異，藉由量測I-V curves從中分析出有利的條件，以熱氧化製程所生長較薄的閘極氧化層與使用LPCVD TEOS所沉積的閘極氧化層，這兩種對於元件通道影響較小的氧化製程能有效地得出良好的Depletion-NMOS。
第二部分則進行了UMOS的切換測試，其UMOS分為兩種layout圖形，依元件的閘極溝槽俯視圖分為六角型與線型，其中六角形又依閘極多晶矽接觸的方式分為Trench Top與Trench Bottom兩種。UMOS元件分別以電路板量測了導通電阻、切換測試與雙脈衝測試，結果顯示六角型元件在導通電阻測試項目中表現較為優秀，切換測試與雙脈衝測試中以線型Trench Top的各項數值較為優良。

The first part of this thesis investigates the electrical differences of 4H-SiC Enhancement-NMOS/PMOS/Depletion-NMOS using different processes, and analyzes the difference in electrical characteristics by measuring I-V curves to find out favorable conditions. A thinner gate oxide layer by thermal oxidation process and a gate oxide layer deposited by LPCVD TEOS, which have less impact on the device channel compared to baseline process, are proven effective in producing good Depletion-NMOS.
In the second part, the switching test of UMOS is conducted. The UMOS is grouped into two layout patterns, hexagonal and line, according to the top-view of the trench. The hexagonal group is further divided into trench top and trench bottom according to the gate poly contact. These UMOS devices were bonded on PCB (Printed Circuit Board) and measured for on-state conduction, switching, and double pulse tests. The results show that the hexagonal devices have better on-resistance, and the line trench top devices have better values in switching and double pulse tests.

摘要 i
Abstract ii
目錄 iii
圖目錄 v
表目錄 vii
第一章 序論 1
1.1 前言 1
1.2 碳化矽材料結構 1
1.3 文獻回顧 3
1.3.1 碳化矽閘極驅動電路 3
1.3.2 雙脈衝測試(Double Pulse Test) 3
1.3.3 溝槽式閘極金氧半場效電晶體 (Trench Gate MOSFET) 6
1.3.4 反向恢復電荷(Recovery Charge, Qrr) 7
1.4 論文動機與大綱 8
第二章 4H-SiC低壓MOSFETs量測與分析 9
2.1 元件設計 9
2.1.1 基板結構 9
2.1.2 元件結構與製程變異 9
2.2 量測結果與分析 12
2.2.1 I-V curves量測 12
2.2.2 結果與討論 30
第三章 UMOS的切換性能測試 32
3.1 元件設計變異與測試電路板 32
3.1.1 元件設計變異 32
3.1.2 電路板 34
3.2 on resistance 35
3.3 切換測試 37
3.4 雙脈衝測試(Double Pulse Test) 42
第四章 結論與未來展望 50
參考文獻 51

[1] F. F. Wang and Z. Zhang, "Overview of silicon carbide technology: Device, converter, system, and application," CPSS Transactions on Power Electronics and Applications, vol. 1, no. 1, pp. 13-32, 2016
[2] D. A. Neamen, Semiconductor Physics and Devices:Basic Principles, 4e, . McGraw-Hill, 2012.
[3] R. Cheung, Silicon Carbide Microelectromechanical Systems for Harsh Environments. Imperial College Press, 2006.
[4] X. She, A. Q. Huang, L. Ó, and B. Ozpineci, "Review of Silicon Carbide Power Devices and Their Applications," IEEE Transactions on Industrial Electronics, vol. 64, no. 10, pp. 8193-8205, 2017
[5] M. Mehregany, C. A. Zorman, N. Rajan, and W. Chien Hung, "Silicon carbide MEMS for harsh environments," Proceedings of the IEEE, vol. 86, no. 8, pp. 1594-1609, 1998
[6] A. R. Powell and L. B. Rowland, "SiC materials-progress, status, and potential roadblocks," Proceedings of the IEEE, vol. 90, no. 6, pp. 942-955, 2002
[7] W. Taha, "Comparative Study on Silicon Carbide (SiC) Polytypes in High Voltage Devices," in 2021 International Conference on Sustainable Energy and Future Electric Transportation (SEFET), 21-23 Jan. 2021 2021, pp. 1-6
[8] M. Brenna, F. Foiadelli, D. Zaninelli, and D. Barlini, "Application prospective of Silicon Carbide (SiC) in railway vehicles," in 2014 AEIT Annual Conference - From Research to Industry: The Need for a More Effective Technology Transfer (AEIT), 18-19 Sept. 2014 2014, pp. 1-6
[9] M. Barlow, S. Ahmed, A. M. Francis, and H. A. Mantooth, "An Integrated SiC CMOS Gate Driver for Power Module Integration," IEEE Transactions on Power Electronics, vol. 34, no. 11, pp. 11191-11198, 2019
[10] S. S. Ahmad and G. Narayanan, "Double pulse test based switching characterization of SiC MOSFET," in 2017 National Power Electronics Conference (NPEC), 18-20 Dec. 2017 2017, pp. 319-324
[11] A. Kumar et al., "Effect of capacitive current on reverse recovery of body diode of 10kV SiC MOSFETs and external 10kV SiC JBS diodes," in 2017 IEEE 5th Workshop on Wide Bandgap Power Devices and Applications (WiPDA), 30 Oct.-1 Nov. 2017 2017, pp. 208-212
[12] J. H. Moon, I. H. Kang, H. W. Kim, O. Seok, W. Bahng, and M.-W. Ha, "TEOS-based low-pressure chemical vapor deposition for gate oxides in 4H–SiC MOSFETs using nitric oxide post-deposition annealing," Current Applied Physics, vol. 20, no. 12, pp. 1386-1390, 2020/12/01/ 2020
[13] B. J. Baliga, Fundamentals of power semiconductor devices. Springer, 2008.