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作者(中文):彭思齊
作者(外文):Peng, Szu-Chi
論文名稱(中文):三相並聯中性點箝位轉換器之環流抑制與中性點電壓平衡控制策略
論文名稱(外文):Mitigating Circulating Current and Balancing Neutral Point Voltage of Three-Phase Paralleled Neutral-Point Clamped Inverters
指導教授(中文):朱家齊
指導教授(外文):Chu, Chia-Chi
口試委員(中文):陳宗柏
連國龍
廖益弘
口試委員(外文):Chen, Tsung-Po
Lian, Kuo-Lung
Liao, Yi-Hung
學位類別:碩士
校院名稱:國立清華大學
系所名稱:電機工程學系
學號:109061591
出版年(民國):111
畢業學年度:110
語文別:英文
論文頁數:37
中文關鍵詞:中性點箝位轉換器並聯交錯式零序環流中性點電壓
外文關鍵詞:NPCParallelInterleavedZero_sequencecirculating_currentneutral-point_voltage
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中性點箝位轉換器(Neutral-Point Clamped Converter, NPC)是多階層(Multi-level)轉換器的一種形式,相較於簡單的二階層(Two-level)轉換器,多階層轉換器可承受更高的工作電壓、輸出交流側電流品質也較高、調變的操作上也更有彈性,適用於工業應用中大功率能量轉換的場合。若要再進一步提升轉換器的傳輸功率,實務上經常使用並聯的架構,因此並聯NPC轉換器是在此應用場合中的熱門選擇。然而,並聯會產生環流的路徑,增加不必要的損耗。此問題常發生於交流側電感不平衡與交錯式操作時。因此,透過分析環流成分,本文將環流分為高頻與低頻的成分,再藉由推導不平衡電路模型,將低頻的環流以共振式(PIR)控制方式消除,而高頻成分的環流則以不連續的脈波寬度調變(DPWM)方式予以降低。除了消除環流之外,中性點電壓平衡也是多階層轉換器必須考量的問題,因此本文在應用環流消除策略後,更進一步探討使用DPWM達成中性點電壓平衡的控制方法,提出能同時兼顧環流消除以及中性點電壓平衡的策略。最後再以模擬與實驗驗證所提策略之效果及可行性。
Parallel connections of three-phase neutral-point-clamped(NPC) inverters have been widely utilized to increase power ratings of energy conversion applications. However, parallel connection will introduce paths for the zero sequence circulating current (ZSCC), which does not exist in the conventional system with single three-phase-three-wire inverter. This problem will become worse especially when these paralleled NPC inverters are operated under interleaved modes with unbalanced filter inductors. To mitigate these circulating currents, an integrated control scheme is proposed to mitigate the low frequency (LF) part and high frequency (HF) part of the ZSCC by proportional–integral-resonant (PIR) control in the inner-loop control, and discontinuous pulse-width modulation (DPWM). At the same time, for NPC inverter, the neutral point voltage (NPV) balance issue should also be considered. Thus a control strategy is proposed based on previous ZSCC mitigating scheme to balance NPV. Both numerical simulations and hardware experiments are performed to validate the effectiveness of the proposed control scheme.
摘要
Abstract
致謝
目錄
Chapter 1 Introduction --------------------------------1
1.1 Motivation-----------------------------------------1
1.2 Literature review ---------------------------------2
1.3 Proposed Strategy ---------------------------------3
1.4 Overview of this thesis ---------------------------4
Chapter 2 Background ----------------------------------5
2.1 Operation Principle of Paralleled NPC inverters ---5
2.2 Modulation scheme of NPC inverter------------------6
2.3 Interleaved operation -----------------------------8
2.4 Summary--------------------------------------------9
Chapter 3 Mitigations of LF-ZSCC ----------------------11
3.1 Averaged Model for Paralleled Inverters -----------11
3.2 Control of dq-Axis Circulating Current ------------12
3.3 Control of z-Axis Circulating Current--------------13
3.4 Extensions to N paralleled NPC inverters ----------14
3.5 Summary--------------------------------------------16
Chapter 4 Mitigations of HF-ZSCC---------------------- 17
4.1 Impacts of Interleaved Operations -----------------17
4.2 DPWM Scheme ---------------------------------------18
4.2.1 DPWM Scheme for Single NPC inverter -------------18
4.2.2 Extensions for Multiple Paralleled NPC Inverters-21
4.3 DPWM for Neutral-Point Voltage Balance ------------22
4.3.1 Simple NPVB method-------------------------------22
4.3.2 Proposed NPVB method ----------------------------23
4.4 Summary--------------------------------------------25
Chapter 5 Simulations and Experimental Validations ----26
5.1 Simulations----------------------------------------26
5.2 Experiments----------------------------------------29
5.3 Summary--------------------------------------------32
Chapter 6 Conclusion and Future Work ------------------33
6.1 Conclusion ----------------------------------------33
6.2 Future Work----------------------------------------33
Reference ---------------------------------------------34
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