現在大部分的時脈訊號都是由石英振盪器所產生，主要是因為石英是目前頻率穩定度最高的振盪元件。然而，石英晶體有大面積、高功率消耗，及無法與CMOS製程做整合等缺點，因此過去幾十年來各界學者專家都試圖尋找能替代石英振盪器的方案。
近年來被提出取代石英振盪器的方法有MEMS振盪器、FBAR振盪器及CMOS振盪器。MEMS及FBAR的製程技術困難，無法與CMOS電路整合；CMOS振盪器由於半導體特性易受環境影響，導致其振盪頻率會受到供應電壓及溫度的變動而改變。這些是到目前為止石英振盪器仍無法完全被取代的原因。
RC弛張振盪器作為一個參考頻率源，面積相較於LC振盪器更小，並且頻率穩定度比環形振盪器更高，因此被廣泛使用。綜合以上所述，我們決定致力於以標準CMOS製程研發一個具備50%責任週期，以供應電壓1.8V為基準±10%的誤差內並且在-40℃到100℃的變化範圍內達到輸出振盪頻率的變異量小於±1%的RC弛張振盪器。
本次研究提出一個由TSMC 0.18 μm 1P6M標準製程所製作的高效率且穩定的時脈產生器，使其振盪頻率在低功率消耗的情況下幾乎不受供應電壓及溫度的變化影響，在溫度25℃時供應電壓1.6V到2.0V的範圍內頻率變異量小於±0.449%，並且在供應電壓1.8V時溫度-40℃到100℃的範圍內頻率變異量小於±0.574%。此外，透過單一充放電路徑加上一個除頻器來實現接近50.0%責任週期及低頻率抖動的參考頻率源。

Nowadays most clock signals are generated by crystal oscillators primarily because of their excellent stability. Nevertheless, in view of the drawbacks of quartz crystal such as large size, high power consumption, and being unable to be integrated into microelectronic process technology, researchers had been devoting themselves to exploiting technologies to replace quartz for several decades.
Recently, several methods such as MEMS, FBAR and CMOS oscillators have been proposed to solve above mentioned problems. Unfortunately, MEMS and FBAR oscillators need complex and costly processes to realize, and they still cannot be integrated with CMOS circuits. And CMOS oscillator is sensitive to supply voltage and temperature variations. These are the reasons why crystal oscillators still cannot be replaced so far.
As an on-chip CMOS reference clock generator, RC relaxation oscillators have been widely adopted due to more compact size as compared to LC oscillators and higher frequency stability as compared to ring oscillators. In this work, we aimed to develop an RC relaxation oscillator with 50% duty cycle, frequency variation less than ±1% with ±10% of supply voltage 1.8V as well as with a temperature range from -40℃ to 100℃.
Fabricated in a standard 0.18 μm CMOS process, an efficient and stable CMOS relaxation oscillator with frequency variation less than ±0.449% for supply voltage changing from 1.6V to 2.0V at 25℃ and less than ±0.574% for temperature sweeping from -40℃ to 100℃ at 1.8V is presented. In addition, nearly 50.0% duty cycle and low jitter are realized by single charging/discharging path and a frequency divider.

摘要 i
Abstract ii
致謝 iii
目錄 iv
圖目錄 vii
表目錄 xi
第一章 緒論 1
1.1 研究背景 1
1.2 研究動機 3
1.3 論文章節架構 7
第二章 CMOS振盪器 8
2.1 CMOS振盪器簡介 8
2.1.1 諧波振盪器(Harmonic Oscillator) 8
2.1.2 弛張振盪器(Relaxation Oscillator) 10
2.2 頻率變異來源 11
2.2.1 供應電壓(Supply Voltage) 11
2.2.2 溫度(Temperature) 13
2.2.3 製程變異(Process Variation) 15
第三章 文獻回顧 16
3.1 平均電壓值回授(Voltage Average Feedback) 16
3.2 使用自我穩壓的RC振盪器 20
3.3 不受溫度影響的電阻 21
3.4 具溫度補償的弛張式振盪器 25
第四章 電路架構 26
4.1 電路架構概述 26
4.2 子電路 27
4.2.1 平均電壓值回授(Voltage Averaging Feedback) 27
4.2.2 低壓差穩壓器(Low Dropout Regulator) 28
4.2.3 運算放大器(Operational Amplifier) 30
4.2.4 比較器(Comparator) 31
4.2.5 固定轉導偏壓電路(Constant-Gm Biasing) 32
4.2.6 充放電路徑(RC Path) 34
4.2.7 Control Buffer 36
4.2.8 Delay Buffer 37
4.2.9 除頻器(Frequency Divider) 38
4.2.10 Buffer Chain 39
4.3 振盪頻率 40
第五章 模擬與佈局 41
5.1 子電路模擬結果 41
5.1.1 運算放大器(Operational Amplifier) 41
5.1.2 比較器(Comparator) 43
5.1.3 固定轉導偏壓電路(Constant-Gm Biasing) 45
5.1.4 充放電路徑(RC Path) 48
5.1.5 Control Buffer 50
5.1.6 Delay Buffer 51
5.1.7 除頻器(Frequency Divider) 52
5.2 整體電路模擬結果 53
5.2.1 振盪器波形 53
5.2.2 穩定時間(Settling Time) 55
5.2.3 抖動(Jitter) 56
5.2.4 工作週期(Duty Cycle) 57
5.2.5 頻率受供應電壓的影響 58
5.2.6 頻率受溫度的影響 60
5.3 晶片佈局 62
第六章 量測結果 65
6.1 PCB板的設計與環境架設 65
6.2 量測儀器介紹 67
6.3 量測方法 68
6.4 量測結果 69
6.4.1 振盪器輸出波形 70
6.4.2 頻率受供應電壓的影響 72
6.4.3 頻率受溫度的影響 73
6.4.4 週期抖動受溫度的影響 74
6.4.5 量測結果彙整 75
6.5 問題討論 77
第七章 結論與未來研究方向 79
7.1 結論 79
7.2 後續研究建議 79
參考文獻 81
附錄 各製程邊界下的模擬結果 84

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