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作者(中文):徐執恩
作者(外文):Hsu, Chih-En.
論文名稱(中文):利用特徵代數進行由上而下的嵌入式系統設計方法
論文名稱(外文):Top-Down Design of Embedded Systems Using Feature Algebra
指導教授(中文):周百祥
指導教授(外文):Chou, Pai H.
口試委員(中文):韓永楷
謝孫源
口試委員(外文):Hon, Wing-Kai
Hsieh, Sun-Yuan
學位類別:碩士
校院名稱:國立清華大學
系所名稱:資訊工程學系
學號:108062612
出版年(民國):110
畢業學年度:109
語文別:英文
論文頁數:69
中文關鍵詞:嵌入式系統設計方法論特徵模型抽象層電子設計自動化電腦代數系統電腦輔助設計
外文關鍵詞:Embedded SystemDesign MethodologyFeature ModelLevel of AbstractionElectronic Design AutomationComputer Algebra SystemComputer-Aided Design
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嵌入式系統的功能,雖然大部份可以由現成、功能豐富的元件實現,設計師只需挑選適用的元件將其組合即可,但是絕大部份的設計任務仍然需要手工設計,市面上的工具無法提供許多設計自動化的功能。設計工具至多也不外捕捉機制的描述,但其設計用意必需以註解或說明文件撰寫,再由設計師人工詮釋或憑經驗推論,才能夠正確地還原當初設計的用意。如此一來,若是設計需要修改後或更新,設計師也必須參與細節檢查,才能確保所有機制都能在系統裡照原本用意發揮的功能。 因為機制本身層次不同,設計師在檢查和套用跨層機制是否符合用意的過程中,許多瑣碎的細節都可能是關鍵的機制,但很容易出錯。一個小錯誤對電路板設計來說可能導致整個板子都要報銷,改板再重新洗板打件不僅耗費人力和成本,更造成專案延宕。

上述設計任務若要自動化,必須先要能夠有一套捕捉不同層次的用意與機制間的對應,從最抽象層到最具體、足以實作電路板的層次。我們提出一套稱為「特徵代數」(feature algebra),以類似代數的形式,表達特徵與其組合,以建立各層裡用意與機制間的對應。我們將特徵層大致分為資訊(information)、數量(quantity)、資料(data)、和載體(carrier)等四大層。這套特徵模型系統也可用來表達不同領域裡需求(requirement)與滿足(fulfillment)的關係。更重要的是,一旦把系統建成這種模型,即可以精簡又精準的方式將特徵的新增、刪除、取代等等操作,對系統做演變,讓我們的工具能自動協助所有細節的調整,以達到完全避免手動處置設計實作上最容易出錯的部份。

本論文的貢獻是一套使用特徵代數,從上到下流程,設計嵌入式系統的方法。我們以實際手動設計的嵌入式系統做為實例,解說我們的設計方法。透過這些範例,我們展示出特徵模型能夠提供工具所需知資訊,不僅可對設計師提出適用各層的建議,同時能自動檢查是否所有設計需求都有被滿足。本研究預期可成為新一代設計工具Sysmaker的核心技術。
Despite the availability of highly integrated system-on-chip (SoC) components, designing embedded systems remains one of the least automated tasks. As design tools capture only the mechanisms in machine-readable form but not the purposes, human engineers must be involved to properly interpret the comments or infer the original intents based on assumptions or experience. As a result, humans must be in the loop to manually ensure all mechanisms serve their supposed purposes in the target system. Due to the cross-layer nature of the mechanisms, such design approach can be tedious and error-prone, and even a minor design mistake can render an entire board inoperable, requiring costly board redesign and refabrication, thus leading to design delays.

To address this problem, we aim to capture design intent at different levels of abstraction, from the most abstract level down to one suitable for board implementation. To capture ideas across different levels, we propose the use of feature algebra, a symbolic math-like computer algebra system (CAS) for expressing features and composing them to reflect the intent at the given level of abstraction. These levels are divided between information, quantity, data, and carrier levels. The feature modeling system also allows requirement-fulfillment relations to be established across layers, allowing a clear separation of concerns and automated checking of completeness of requirements in different domains. More importantly, designs modeled this way will be more evolvable by feature addition, deletion, or substitution concisely and precisely, all without requiring manual handling of the most error-prone parts of the design.

The contribution of this thesis is a new top-down design flow for embedded systems using feature algebra. We illustrate the methodology with several actual embedded systems that have been designed manually. We show the use of feature modeling to empower design tools to provide not only helpful suggestions at different levels but also enable automatic checking for whether all requirements have been met. This work is expected to be a core part of a newly proposed design tool called Sysmaker.
Contents i
Acknowledgments vi
1 Introduction 1
1.1 Motivation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
1.2 Observations . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3
1.2.1 Information vs. Data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3
1.2.2 System Modeling by Feature Operation . . . . . . . . . . . . . . . . . . . . 3
1.3 Contributions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
1.4 Thesis Organization . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
2 Related Work 5
2.1 Platform-based Design . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
2.1.1 Hardware Kits with SDK . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
2.2 Synthesis-based Design . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
2.3 Component-based Design . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
2.3.1 Component Modeling . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
2.3.2 Feature-Based System Modeling . . . . . . . . . . . . . . . . . . . . . . . . 9
3 Design Concepts 11
3.1 Feature Model . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
3.1.1 Function Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
3.1.2 Structure Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
3.1.3 Parameter Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
3.1.4 Concept Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
i
3.1.5 Symbol Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
3.1.6 Document Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
3.2 Feature Flow . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
3.2.1 Feature Flow at High Level . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
3.2.2 Feature Entity . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
3.2.3 Feature Value . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
3.2.4 Feature Port . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
3.3 Feature Algebra . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
3.3.1 Feature Expressions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
3.3.2 Operands . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
3.3.3 Operators . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
4 Design Methodology 28
4.1 Design Flow . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28
4.2 Illustrative Example: A Personal Alarm Device . . . . . . . . . . . . . . . . . . . . 30
4.2.1 Goals Setting . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30
4.2.2 Feature Formalization and Expression Writing . . . . . . . . . . . . . . . . 31
4.2.3 Substitution of Feature Expression . . . . . . . . . . . . . . . . . . . . . . . 33
5 Implementation 39
5.1 Operator Overloading in Python . . . . . . . . . . . . . . . . . . . . . . . . . . . . 39
5.2 Expression Tree Data Structures . . . . . . . . . . . . . . . . . . . . . . . . . . . . 40
6 Case study and Evaluations 42
6.1 Case Study: Stethogram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 42
6.1.1 Application: COPD Monitoring . . . . . . . . . . . . . . . . . . . . . . . . 42
6.1.2 Requirements . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 44
6.2 System Modeling using Feature Algebra . . . . . . . . . . . . . . . . . . . . . . . . 45
6.2.1 System Expressions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 45
6.2.2 Component Replacement . . . . . . . . . . . . . . . . . . . . . . . . . . . . 56
6.3 Evaluations . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 57
6.3.1 Automated Checking . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 57
ii
6.3.2 Expressiveness . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 59
6.3.3 Maintenance . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 60
7 Conclusions and Future Work 61
7.1 Conclusions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 61
7.2 Future Work . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 61
A Stethogram expressions in Feature Algebra 66
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