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[1] Tung-He Chou, Yu-Chih Chang, Binglung Yu, Chun-Fu Chen, Yung-Tai Hung, Tuung Luoh, Ling-Wuu Yang, Tahone Yang, Kuang-Chao Chen, “Capacity Simulation by Cellular Automation in Endura Platform,” in Proc. e-Manufacturing and Design Collaboration Symposium, 2016. [2] Henry L. Gantt, “A graphical daily balance in manufacture,” Transactions of the American Society of Mechanical Engineers, vol 24, pp. 1322–1336, 1903. [3] Taehee Jeong, Deeksha Prakash Kankalale, Raymond Chau, Hyeran Jeon, “Going Deeper or Wider: Throughput Prediction for Cluster Tools with Machine Learning,” in Proc. International Conference on Big Data Computing, Applications and Technologies, 2019. [4] Chihyun Jung and Tae-Eog Lee, “An Efficient Mixed Integer Programming Model Based on Timed Petri Nets for Diverse Complex Cluster Tool Scheduling Problems,” IEEE Transactions on Semiconductor Manufacturing, 2012, vol. 25, no. 2, pp. 186-199. [5] Chihyun Jung and Tae-Eog Lee, “Cyclic Scheduling of Cluster Tools With Nonidentical Chamber Access Times Between Parallel Chambers,” IEEE Transactions on Semiconductor Manufacturing, 2012, vol. 25, no. 3, pp. 420-431. [6] Dae-Kyu Kim, Tae-Eog Lee, and Hyun-Jung Kim, “Optimal Scheduling of Transient Cycles for Single-Armed Cluster Tools,” in Proc. International Conference on Automation Science and Engineering, 2013, pp. 874-879. [7] Sung-Gil Ko, Tae-Sun Yu , and Tae-Eog Lee, “Scheduling Dual-Armed Cluster Tools for Concurrent Processing of Multiple Wafer Types With Identical Job Flows,” IEEE Transactions on Automation Science and Engineering, 2019, vol. 16, no. 3, pp. 1058-1070. [8] Jun-Ho Lee, Hyun-Jung Kim, and Tae-Eog Lee, “Scheduling Cluster Tools for Concurrent Processing of Two Wafer Types,” IEEE Transactions on Automation Science and Engineering, 2014, vol. 11, no. 2, pp. 525-536. [9] George H. Mealy, “A method for synthesizing sequential circuits,” Bell Labs Technical Journal, vol 34, pp.1045-1079, 1955. [10] Edward F. Moore, “Gedanken-Experiments on Sequential Machines,” Automata studies, pp. 129–153, 1956. [11] David A. Nehme and Neal G. Pierce, “Evaluating the throughput of cluster tools using event-graph simulations,” in Proc. Advanced Semiconductor Manufacturing Conference and Workshop (ASMC), 1994, pp. 189–192. [12] Sang C. Park, Euikoog Ahn, Yongho Chung, Ka-ram Yang, Byung H. Kim, Jeong C. Seo, “Fab Simulation with Recipe Arrangement if Tools,” in Proc. Winter Simulations Conference (WSC), 2013, pp. 3840-3849. [13] Paht Te Quek, Boon Ping Gan , Song Lian Tan, Chan Lai Peng, Bart vd Heijden, “Analysis of the front-end wet strip efficiency performance for productivity,” in Proc. International Symposium on Semiconductor Manufacturing, 2007, pp. 1–4. [14] Hiroe Watanabe, “Development of Wafer Transfer Simulator Based on Cellular Automata,” IEEE Transactions on Semiconductor Manufacturing, 2015, vol. 28, no. 3, pp. 283-288. [15] Uno Wikborg and Tae-Eog Lee, “A Petri Net Method for Schedulability and Scheduling Problems in Single-Arm Cluster Tools With Wafer Residency Time Constraints,” IEEE Transactions on Semiconductor Manufacturing, 2008, vol. 21, no. 2, pp. 224-237. [16] Uno Wikborg and Tae-Eog Lee, “Noncyclic Scheduling for Timed DiscreteEvent Systems With Application to Single-Armed Cluster Tools Using ParetoOptimal Optimization,” in Proc. International Conference on Automation Science and Engineering, 2013, vol. 10, no. 3, pp. 699-710. [17] Xiuhong Zheng, Jingtao Hu, Haibin Yu, “Research on a simulation platform assisting analysis of the cluster tool,” in Proc. International Conference on Computer Research and Development, pp. 249-253, 2011. [18] Wlodek M. Zuberek, “Cluster Tools With Chamber Revisiting—Modeling and Analysis Using Timed Petri Nets,” IEEE Transactions on Semiconductor Manufacturing, 2004, vol. 17, no. 3, pp. 333-344. [19] Plotly Technologies Inc., “Collaborative data science,” Available: https://plot.ly.
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