由於現今科技的日新月異，受到AI人工智慧、電動車及5G通訊等新興產業的蓬勃發展，連帶使得對於半導體產業的需求量逐年增加，再加上自新冠肺炎的疫情爆發以來，不論是生活還是工作上，模式都開始進行轉變，使各類晶片的需求量提高，包含行動通訊用品、筆記型電腦，甚至是車用晶片，都產生了供不應求的現象，促使半導體盛況空前。同時，對於晶片的要求也越加嚴苛，半導體元件朝向低功耗和高效能的目標發展。

因此，為了將半導體元件更加緊密的擺放在積體電路上，我們把半導體的技術節點持續微縮。然而，無可避免的元件微縮是有物理上的限制，所以解決此困難是當今首要的課題。目前許多半導體相關的研究團隊也朝著此方向著手研究，透過改變元件結構及半導體材料，來改善元件的電特性。鐵電材料(Ferroelectric, FE) 被應用於鐵電極化的翻轉来控制通道電流的開關。而現今最常使用到的鐵電材料(HfO2)，其介電常數是SiO2的約5倍，目前已在動態隨機存取記憶體(DRAM)、高介電質(high-k dielectric)電晶體等已經被廣泛使用，早已在半導體產業中佔有一席之地。再加上近年二維材料性質的研究發展，透過第一原理能計算出HfO2的能帶和電荷的分佈，能夠在HfO2薄膜上可以觀察到其具有鐵電性質。HfO2藉由薄膜沈積來保持晶形，並利用摻雜的方式誘導形成正交晶格(orthorhombic)，即為HfO2鐵電相所需要的晶格結構。

就目前而言在微縮尺寸上，半導體元件正遭受著嚴苛的考驗，為了摩爾定律(Moore's law)的延續，解決微縮過程中的瓶頸，除了在尺寸可以進行更動之外，也能藉由材料的更換或元件處理，來提升元件之電特性。近幾年來，鐵電材料(Ferroelectric, FE)被多方面地應用於元件上，其鐵電效應能讓元件的次臨界斜率小於60mV/decade，突破物理限制，以達到高效能、低功耗的目標。

本論文研究在絕緣矽基板(Silicon-on-insulator, SOI)上製作矽鍺通道(Si1-xGex, x = 0.2)之p型(p-type)鐵電鰭式場效電晶體(Fe-FinFET)，以氮化鉭(TaN)作為金屬閘極(Metal Gate, MK)，並利用氨電漿處理二氧化鉿 (HfO2)作為閘極氧化層，修補介面層缺陷，來優化矽鍺鐵電鰭式電晶體的次臨界斜率之方式。為了證明氨電漿處理HfO2能確實將氮元素(N)摻雜進HfO2中，我們以二次離子質譜儀(Secondary Ion Mass Spectrometer: SIMS)、X射線光電子能譜學(X-ray photoelectron spectroscopy, XPS)、低掠角X光繞射分析(Grazing incidence X-ray diffraction, GIXRD)等儀器來佐證。

其中，在使用二氧化鉿 (HfO2) 經由氨電漿處理之後形成鐵電材料的情況下，與對照組未經處理的氧化鉿相比，p-type Si0.8Ge0.2 Fe-FinFET經氨電漿處理之後的ID-VG特性曲線顯現出其具有較高的開關電流比(On/Off current ratio, ION/IOFF)以及擁有較低的次臨界斜率(Subthreshold slope, SS)。再者，針對p-type Si0.8Ge0.2 Fe-FinFET 經氨電漿處理，分別對元件的介面層進行製程處理，藉由改善元件內部的材料缺陷，並比較次ION/IOFF和SS在處理前後之變化。因此從電特性的曲線圖中我們可發現到，介面層經雙氧水(H2O2)處理之後，其SSmin值能有所下降，並且改善輸出電流。

本研究中所使用的矽鍺通道鐵電鰭式電晶體，除了本身擁有良好的特性與簡易的製程外，仍能藉由電漿處理及介面層處理等方式，來優化元件之特性，以此克服未來元件在微縮上的瓶頸，可以看出其重要性。

Nowadays, Due to the rapid development of technology, the vigorous growth of emerging industries such as AI (artificial intelligence), electric vehicles, and 5G communications has increased the demand for the semiconductor industry year by year. In addition, since the COVID-19, the habits have begun to change, both in life and at work. This leads to increased demand for various chips, including mobile communication products, notebook computers, and even automotive chips.

At the same time, the requirements for wafers are becoming more and more stringent, and semiconductor components are developing towards the goal of low power consumption and high performance. Therefore, to apply semiconductor devices more closely in integrated circuits, we continue to scale the technology nodes of semiconductors. However, there are physical limitations to the scale of MOSFETs, and how to solve this difficulty is a priority today.

At present, many semiconductor-related research teams are also working in this direction to improve the device’s electrical characteristics by changing the device structure and semiconductor materials. Ferroelectric materials (FE) are applied to the inversion of ferroelectric polarization to control the switching of channel currents. HfO2 is the most common material used in ferroelectric applications today; its dielectric constant is about five times that of SiO2 and has been used in dynamic random access memory (DRAM), high dielectric constant (high-k dielectric) transistors. It has been widely used and has already occupied a place in the semiconductor industry. Coupled with the research and development of the properties of two-dimensional materials in recent years, it can be observed that it has ferroelectric properties on HfO2 thin films, and its ferroelectricity can be obtained by first-principles calculation of the energy band and charge distribution of HfO2. HfO2 maintains the crystal form by thin film deposition and induces the formation of an orthorhombic lattice by doping, which is the lattice structure required for the ferroelectric phase of HfO2.

In terms of miniaturization, semiconductor devices are undergoing severe tests. In order to continue Moore's law and overcome the obstacle in the miniaturization process, in addition to scaling the size, it can also be adjusted by materials replacement or post-processing of MOSFETs to improve the electrical characteristics of MOSFETs. In recent years, ferroelectric materials (FE) have been applied to MOSFETs in many aspects. The ferroelectric effect can make the subthreshold slope of MOSFETS less than 60mV/decade, breaking through physical limitations to achieve a high-efficiency, low-power consumption goal.

This thesis mentions the fabrication of p-type (p-type) ferroelectric fin field-effect transistors (Fe-FinFETs) with silicon-germanium channels (Si1-xGex, x = 0.2) on silicon-on-insulator (SOI) substrates, using tantalum nitride (TaN) as the metal gate (MK), and using ammonia plasma to treat hafnium dioxide (HfO2) as the gate oxide layer to repair the defects of the interface layer to optimize the SiGe ferroelectric FinFET of the subthreshold slope of the transistor. In order to prove that ammonia (NH3) plasma treatment of HfO2 can indeed dope nitrogen (N) into HfO2, we used Secondary Ion Mass Spectrometer (SIMS), X-ray photoelectron spectroscopy (XPS), Grazing incidence X-ray diffraction (GIXRD) and other instruments to support.

Among them, analyzing the effect of the oxide layer after NH3 plasma treatment on the transistor, The ID-VG characteristic curve after treatment of the p-type Si0.8Ge0.2 Fe-FinFET showed a higher On/Off current ratio (ION/IOFF) and a lower Subthreshold slope (SS). Furthermore, for the p-type Si0.8Ge0.2 Fe-FinFET treated by NH3 plasma, the interface layer of the device is processed separately to improve the material defects inside the device and compare the change of the subthreshold slope before and after the treatment. Therefore, from the graph of the electrical characteristics, we can find that after the interface layer is treated with hydrogen dioxide (H2O2), the SSmin value can be decreased, and the output current can be improved.

The silicon germanium channel ferroelectric fin transistor studied in this research has good characteristics and a simple manufacturing process and can still optimize the characteristics of the device by plasma treatment and interface layer treatment so as to overcome the obstacle of future components in scaling. It can show its importance.

目錄
摘要 i
Abstract iv
致謝 viii
目錄 ix
表目錄 xi
圖目錄 xi
第一章 1
簡介 1
1.1 摩爾定律(Moore's law) 1
1.2 高遷移率(high mobility)的通道材料 3
1.3 絕緣體矽基板上(SOI)鰭式場效電晶體(FinFET) 4
1.4 矽鍺通道場效電晶體(SiGe FET) 6
1.5 鐵電場效電晶體(FE FET) 7
1.6 負電容效應(Negative capacitance, NC) 12
1.7 研究動機 14
1.7.1 矽鍺通道鰭式電晶體(SiGe FinFET) 14
1.7.2 鐵電材料(ferroelectric material, FE) 15
1.7.3 與基板間的界面品質(quality of interfacial layer) 18
1.7.4 電漿處理(plasma treatment) 18
1.8 論文架構 20
第二章 21
鐵電鰭式電晶體特性 21
2.1 傳統的金氧半場效電晶體(MOSFET)基本原理 21
2.2 金氧半場效電晶體(MOSFET)的重要參數 23
A. 臨界電壓 (Vt) 23
B. 次臨界斜率 (SS) 24
C. 開關電流比 (ION/IOFF) 24
2.3鐵電場效電晶體與傳統電晶體的差異 24
第三章 27
金屬-絕緣體-半導體（Metal-Insulator-Semiconductor, MIS）電容經NH3電漿處理前後之製程結構、材料分析及特性的比較 27
3.1 元件結構與製成流程: 27
3.2 閘極氧化層之材料分析 30
3.2.1二次離子質譜儀(Secondary Ion Mass Spectrometer: SIMS) 30
3.2.2 X射線光電子能譜學 (X-ray photoelectron spectroscopy, XPS) 33
3.2.3低掠角X光繞射分析(Grazing incidence X-ray diffraction, GIXRD) 39
3.2.4 MIS電容利用PUND (positive-up-negative-down)量測特性 41
第四章 46
4.1 結構與製程流程: 46
4.2 氨電漿處理氧化層及界面氧化層(IL)對於電晶體特性之影響 49
4.2.1 穿透式電子顯微鏡(Transmission Electron Microscope, TEM)以及能譜分析儀(Electron Diffraction Spectrum, EDS) 49
4.2.2 電特性分析 52
第五章 57
結論 57
參考文獻 61

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第二章

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第三章

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第四章

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