替代金屬閘極(RMG)在現今的FinFET CMOS製程中是相當主流的技術之一，透過沉積多層的功函數金屬來調變臨界電壓(VT)，以因應不同類型元件的需求。在功函數金屬之後，尚須填充鎢(W)這類的低電阻率之金屬，提升閘極的導電性。在填充鎢金屬之前，往往需要事先沉積一層氮化鈦(TiN)作為阻擋層/附著層。然而，隨著技術節點微縮，在功函數金屬厚度不變的條件下，阻擋層佔據了閘極溝槽大部分空間，這結果將限制了鎢金屬的填充，導致較高的閘極電阻。因此，為了能讓元件持續微縮，勢必要發展新的阻擋層材料，降低其厚度，以解決CMOS的導電性問題。
　　本篇論文研究利用對功函數金屬鋁化鈦(TiAl)進行局部摻氮製程，形成氮化鋁鈦(TiAlN)，並實現其作為鎢金屬閘極阻擋層的電容元件。元件的量測發現，使用TiAlN阻擋層的元件之平帶電壓，可以等效於使用5 nm TiN阻擋層的元件，證明TiAlN也具有良好的阻擋效果。在片電阻的量測上，以摻氮之TiAlN取代TiN並搭配鎢金屬堆疊，其阻值也降低了近20%。
　　改用對TiAl摻氮形成之TiAlN，能夠解決因犧牲額外的TiN阻擋層所衍生的問題，提升鎢金屬閘極的特性；經過可靠度測試後，TiAlN之元件也有比擬傳統TiN的表現。以上結果說明了TiAlN阻擋層的可行性，並提供了改善先進RMG製程的方案，可以延續至未來更加微縮的技術節點。

　　Replacement metal gate nowadays has been one of the mainstream technologies in FinFET CMOS process. It enables threshold voltage modulation by depositing multi-layer effective work function metal to meet the requirement for different types of devices. After the work function metal, it is necessary to fill low resistivity metal such as W to increase gate conductance. The module used to deposit TiN as a barrier/adhesion layer prior to bulk W fill. However, with technology node scaling and work function metal layers thickness maintained, these barrier layers occupy a major portion of the gate trench, resulting in the limit for W fill and high gate resistance. Therefore, in order to keep devices scaling, new barrier material must be developed to overcome CMOS conductivity issues.
　　This approach utilizes partially nitrogen-incorporated work function metal TiAl, which promotes the formation of TiAlN, and realizes the capacitor device with TiAlN barrier layer below the tungsten metal gate. The measurement shows that the flat band voltage adopting TiAlN barrier can be equivalent to that of 5nm TiN barrier, suggesting TiAlN also displays good blocking effect. For the sheet resistance, replacing TiN by TiAlN followed by tungsten metal stack gets lowered by nearly 20%.
　　Adopting nitrogen-incorporated TiAlN could solve problems due to sacrificing additional TiN barrier layer and improve the tungsten metal gate characteristics. After reliability test, TiAlN-devices also demonstrate comparable performance with conventional TiN-devices. The results above illustrate the feasibility of TiAlN barrier and provide the solution to advanced RMG fill integration, which is extendable to future highly scaled technology node.

摘要 i
Abstract ii
誌謝 iv
目錄 vi
表目錄 viii
圖目錄 ix
第一章 緒論 1
1-1 研究背景 1
1-2 閘極氧化層材料的演進 2
1-3 閘極材料的演進 5
1-3-1 多晶矽閘極 5
1-3-2 金屬閘極 6
1-4 鎢金屬填充 7
1-5 研究動機 8
1-6 論文結構 9
第二章 文獻回顧 19
2-1 改變金屬沉積順序以改善閘極電阻率 19
2-2 更換材料以改善閘極電阻率 20
2-2-1 以鈷取代鎢作為閘極填充材料 20
2-2-2 使用不同阻擋層材料 21
第三章 實驗設計與製作流程 29
3-1 實驗規劃 29
3-2 元件製作與流程 29
3-2-1 基板與晶片清潔 29
3-2-2 閘極堆疊 30
3-2-3 混成氣體退火 31
3-2-4 片電阻量測試片製備 32
3-3 元件量測 32
第四章 實驗結果與討論 39
4-1 電容特性分析 39
4-1-1 電容－電壓特性曲線分析 39
4-1-2 平帶電壓分析 40
4-2 漏電流特性分析 42
4-3 可靠度分析 43
4-3-1電容可靠度 43
4-3-2 漏電流可靠度 44
4-4 金屬片電阻分析 44
第五章 結論與未來展望 55
參考文獻 57

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