本論文主要是探討大電流常閉型氮化鎵高電子遷移率電晶體的設計與製作。我們利用P型氮化鎵/氮化鋁鎵/氮化鎵磊晶在矽基板的磊片進行大電流常閉型高電子遷移率電晶體之製作。
首先，利用P型氮化鎵實現常閉型的元件一直存在著P-GaN蝕刻不均勻性的問題，利用增加磊晶AlN層作為蝕刻阻擋層可以增加蝕刻均勻性，但會使元件的臨界電壓(VTH)下降，我們利用減少AlGaN層的Al比例使元件在有AlN層時臨界電壓(VTH)可以達到1.25V，另外我們也對元件進行動態量測以驗證製程與磊晶片緩衝層的特性。
接著我們以優化後的磊片進行大電流元件的製作，大電流元件尺寸設計有分兩個方向，第一個是提升崩潰電壓，第二個是提升最大飽和電流。第一個部分我們探討利用增加閘極與汲極的距離(LGD)以增加崩潰電壓，發現LGD為30μm的元件能夠兼具電流與崩潰電壓的最佳值。此元件最大飽和電流約為6.1A，並達到崩潰電壓753V。第二個部分，利用增長閘極寬度(WG)提升元件飽和電流，發現在閘極寬度(WG)為300mm時，飽和電流(IDS)可以達到12.2A、臨界電壓(VTH)為1.4V、導通電阻Ron為0.5Ω，崩潰電壓也能夠達到669V崩潰電壓。另外我們也有對元件進行變溫量測的可靠度分析。

In this thesis, our research is mainly about design and fabrication of high current enhancement mode high electron mobility transistor. First, P-type GaN E-mode HEMT have the problem of etching depth uniformity and plasma etching damage during P-GaN etching process. We can improve the etching quality by AlN etching stop layer, but it will reduce threshold voltage of the device. So We improve the threshold voltage to 1.25V by reducing the Al composition of AlGaN. In addition, we also use pulse I-V dynamic measurement to analyze process and epitaxy buffer layer characteristics. Then we use the optimized wafer to fabricate high current enhancement mode HEMT. There are two topics of layout design. One is to increase breakdown voltage; another one is to increase saturated current.
In the first part, we improve breakdown voltage by increasing gate to drain spacing (LGD). When LGD is 30μm, the device has high performance both in saturated current and breakdown voltage. Saturated current (IDS) is 6.1A and breakdown voltage can reach to 753V. The second part, we improve saturated drain current by increasing total gate width (WG). When WG is 300mm, saturated current (IDS) can reach to 12.2A, threshold voltage is 1.4V, the on-resistance (RON) is 0.5Ω, breakdown voltage can even reach to 669V. we also use temperature variation measurement to analyze reliability characteristic.

摘要 I
ABSTRACT II
致謝 III
TABLE OF CONTENTS IV
LIST OF FIGURES VI
LIST OF TABLES IX
CHAPTER 1 Introduction 1
1-1 Background Research of Gallium Nitride (GaN) 1
1-2 GaN HEMT development and application 3
1-3 AlGaN/GaN heterojunction and 2DEG formation mechanism 5
1-4 Enhancement mode HEMT (E-mode HEMT) 7
1-5 Motivation 9
1-6 Thesis Organization 10
CHAPTER 2 Fundamental principles of HEMT and device analysis 11
2-1 HEMT working principle and mechanism 11
2-1-1 Conventional D-mode HEMT working principle 11
2-1-2 P-GaN HEMT working principle 14
2-2 Transmission Line measurement (TLM) 16
2-3 Pulse I-V measurement 20
Chapter 3 Design And Fabrication of High Current P-GaN HEMT 23
3-1 Epitaxial structure 23
3-2 Experiment design 24
3-2-1 Different wafer structure of P-GaN HEMT 24
3-2-2 High current P-GaN HEMT 25
3-3 Process flow 29
3-3-1 Process flow of P-GaN HEMT 29
3-3-2 P-GaN enhancement mode high current HEMT 35
3-4 Measurement system 43
3-4-1 DC characteristics 43
CHAPTER 4 RESULT AND DISCUSSION 45
4-1 P-GaN HEMT 45
4-1-1 Etching depth and Transmission line model (TLM) measurement 47
4-1-2 Device Simulation by TCAD 50
4-1-3 DC characteristics analysis 51
4-1-4 Pulse IV dynamic characteristic analysis 54
4-2 High current P-GaN HEMTs 56
4-2-1 Etching depth and TLM measurement 56
4-2-2 Different LGD high current HEMT characteristics analysis 58
4-2-3 Different gate width high current HEMT characteristics analysis 65
CHAPTER 5 Conclusions 72
REFERENCE 73

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