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作者(中文):吳彥璋
作者(外文):Wu, Yan-Zhang.
論文名稱(中文):使用鏈結式直接記憶體存取與即時作業系統對於穿載式多模態醫療裝置的效能最佳化
論文名稱(外文):Performance Optimization with Linked DMA and RTOS for Wearable Multi-Modality Medical Devices
指導教授(中文):周百祥
指導教授(外文):Chou, Pai H.
口試委員(中文):韓永楷
周志遠
口試委員(外文):Hon, Wing-Kai
Chou, Jerry
學位類別:碩士
校院名稱:國立清華大學
系所名稱:資訊工程學系
學號:107062633
出版年(民國):109
畢業學年度:108
語文別:英文
論文頁數:51
中文關鍵詞:低功耗直接記憶體存取即時作業系統穿戴式裝置
外文關鍵詞:low powerDirect Memory AccessReal-Time Operating Systemwearable device
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設計穿戴式醫療裝置來監控與記錄資料,將會面臨缺乏有效動態功耗管理的挑戰。本論文提出一種功耗最佳化排程設計,運用於新型微控制器(microcontroller unit, MCU)、使用鏈結式直接記憶體存取(Linked DMA, LDMA)與即時作業系統(real-time operating system, RTOS)、整合多模態應用需求的實作方式,在不犧牲性能的前提下,得以最小化系統的運作功耗以及CPU所需執行時間。LDMA與傳統DMA不同之處,在於能夠獨立自主處理一連串的輸入、輸出操作,得以節省主處理器的執行指令數量,藉此獲得更多進入節能模式的機會。實驗數據顯示,相較於傳統DMA的設計方式,使用LDMA可以讓主處理器的使用率減少36%,進而節省4%的整體能源消耗。
A challenge with designing wearable medical devices is that they need to be monitoring and logging data and cannot be easily power managed by dynamic power management (DPM) techniques. This thesis proposes a power-mode scheduling method on the microcontroller unit (MCU) for multimodality sensing while taking advantage of the novel “linked direct-memory access” (LDMA) on modern MCUs and Micrium OS to minimize power consumption and execution time by the processor core while maintaining the required performance. Unlike traditional DMA, LDMA enables the controller to autonomously handle a sequence of transactions that would require processor instructions to control in traditional DMA. Experimental results show a reduction of 36% CPU utilization, which results in 4% energy savings in system-level compared to baseline DMA.
Contents i

Acknowledgments vi

1 Introduction 1
1.1 Motivating Application: CPR Data Logging . . . . . . . . . . . . . . . . . . . . . . 1
1.2 Bluebox System . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2
1.3 Contributions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3
1.4 Thesis Organization . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3

2 Background and Related Work 4
2.1 Background on I/O for Embedded System . . . . . . . . . . . . . . . . . . . . . . . 4
2.1.1 Program I/O . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
2.1.2 Interrupts . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
2.1.3 Direct Memory Access (DMA) . . . . . . . . . . . . . . . . . . . . . . . . 5
2.1.4 Linked DMA (LDMA) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
2.2 Low-Power Design . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
2.2.1 Power Management on MCUs . . . . . . . . . . . . . . . . . . . . . . . . . 7
2.2.2 Power Management for Peripherals . . . . . . . . . . . . . . . . . . . . . . 8
2.3 Body Sensor Networks . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
2.4 Real-Time Operation System . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10

3 Illustrative Example 11
3.1 Application: Medical Data Logging . . . . . . . . . . . . . . . . . . . . . . . . . . 11
3.1.1 Background: Code Blue . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
3.1.2 Requirements . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
3.2 System Architecture . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
3.2.1 MCU Architecture . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
3.2.2 Bluebox Peripheral Components . . . . . . . . . . . . . . . . . . . . . . . . 15
3.3 Application Workload . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
3.4 Data Layout . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
3.4.1 ADS1298 Data Buffer . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
3.4.2 ICM20948 Data Buffer . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
3.4.3 Page Arrangement . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17

4 Linked DMA 19
4.1 Background of Linked-DMA . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
4.2 Peripheral Reflex System . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
4.3 Iterative routine processing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
4.4 Comparison between Program I/O, DMA, LDMA . . . . . . . . . . . . . . . . . . 24
4.5 Hardware Sharing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24
4.5.1 Peripheral Reuse . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25
4.5.2 Protocol Pin Reuse . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25
4.6 Limitations . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27

5 Real-Time Operating System 28
5.1 Background . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28
5.2 Bare-Metal vs. RTOS base . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29
5.3 Impact of RTOS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29
5.4 Remaining Time Improving . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30
5.5 Scheduling . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31
5.5.1 Real-Time Condition . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31
5.5.2 Priority Considerations . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32
5.5.3 Schedulability Proving . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32
5.6 Scheduling Result . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33

6 Evaluation 34
6.1 Power Measuring Equipment . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34
6.2 Hardware Limitation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34
6.2.1 Sampling Mechanism of ADS1298 and ICM20948 . . . . . . . . . . . . . . 34
6.2.2 ICM20948 Mechanism . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 35
6.3 Multi-Modality Sensing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 36
6.3.1 Cooperation between Sensors . . . . . . . . . . . . . . . . . . . . . . . . . 36
6.3.2 Duty Cycle Length . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 36
6.3.3 Load Balancing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 36
6.4 Peripheral to Peripheral . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 37
6.4.1 SPI to SPI Mechanism . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 37
6.5 Power Mode Test . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 41
6.5.1 Switch Mode Considered . . . . . . . . . . . . . . . . . . . . . . . . . . . . 41
6.5.2 Test Current Result . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 41
6.6 Experimental Results . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 42
6.6.1 Overhead proportion: CPU Time . . . . . . . . . . . . . . . . . . . . . . . . 42
6.6.2 Overhead proportion: Current . . . . . . . . . . . . . . . . . . . . . . . . . 42
6.6.3 Comparison of Related Works . . . . . . . . . . . . . . . . . . . . . . . . . 43

7 Conclusions and Future Work 45
7.1 Conclusions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 45
7.2 Future Work . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 46

Appendix 50
Photoplethysmography Signal . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 50
Pulse Width Modulation vs. Interrupt Request . . . . . . . . . . . . . . . . . . . . . 50
Light Intensity . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 50
SPI Serial Clock . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 51
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